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PB2022.02 低无源互调失真法兰安装同轴连接器的改进设计

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Abstract—Imperfect electrical connections cause multiple problems in radio frequency (RF) measurements, passive intermodulation (PIM) being the most common one. This paper proposes a new design approach to reduce the PIM distortion caused by the imperfect electrical connection in flange mount coaxial connectors. The proposed approach employs a flexible ring embedded in the outer conductor of the flange mount coaxial connector to improve the reliability of the metal electrical connection. A simulation model is further developed to analyze the effects of the embedded ring on the signal transmission performance. The effectiveness of the proposed approach is verified by experiments, demonstrating that the improved design can not only decrease the PIM level by up to 9 dB, but also show a good reliability and stability in the conditions requiring repeated connection and disconnection, and thus, this method has the potential for the application of all flange mount devices.

Index Terms—Passive intermodulation, flange mount coaxial connector, imperfect electrical connections, contact faults.



Passive intermodulation (PIM) is the distortion generated by weak nonlinear characteristics in passive devices such as connectors, multiplexers, etc. [1]-[3]. When two fundamental frequencies (f1, f2) are considered, the possible frequency components of PIM distortion can be described as fN(PIM) =mf1+nf2, where m and n are the coefficients of the fundamental frequencies, N is the order of PIM products, which can be calculated by N=|m|+|n|. The third-order PIM frequencies (2f1-f2, 2f2-f1) are very close to the fundamental frequencies, and thus are difficult to be eliminated by filters [4], [5]. Therefore, reducing PIM distortion in microwave circuits and RF measurement systems is challenging and relies on the design of low PIM devices.

Flange mount coaxial connectors, which have been used extensively to connect printed circuit board (PCB) or flange devices, are the main contributions to the PIM distortion [6], [7]. Three different kinds of sources, the nonlinear oxide (contaminant) films, the ferromagnetic material plating, and the imperfect electrical connections, are considered as the dominant reasons for PIM distortion in coaxial connectors [8]. Sources of both nonlinear oxide (contaminant) films and ferromagnetic material plating have been well concerned [9]- [11]. For example, in [9], the effects of coating materials and iron content in base brass on PIM performance have been investigated. In [10], the PIM distortion caused by aluminum plating-oxide films has been analyzed. In [11], the design guideline and plating standards have been proposed to minimize PIM generation in RF cables and connectors. However, to the best of authors’ knowledge, only a limited number of contributions have focused on the theoretical analysis for the source of imperfect metallic contact [12], [13], the manufacturing approaches for reducing the PIM distortion caused by imperfect electrical connections have not been sufficiently estimated. In practical situations, the manufacturing error, slight deformations of the contact surface, or tightened with insufficient torque, could potentially leads to an imperfect electrical connection in the flange mount surface when connected. Therefore, it is of great importance to design the high-reliability flange mount coaxial connector to reduce the PIM distortion and then improve the performance of the devised RF measurement system.

This paper proposes a modified design to improve the connection reliability and lower the PIM distortion generated by the imperfect electrical connection in N-type flange mount connectors, and this work is organized as follows. In Section II, the structures of the flange mount coaxial connectors are analyzed to investigate the physical mechanism and potential reasons for generating PIM distortion due to the imperfect electrical connection. In Section III, the improved design method is proposed, and the dimension and plating materials of the modified ring are further analyzed to minimize the PIM distortion in the flange mount coaxial connector by imperfect metallic contact. In Section IV, transmission characteristics, including the S21-parameter, the contact impedance, and the transmission loss for the improved design method are discussed to investigate the effect of structural changes on the quality of signal transmission. In Section V, experiments are conducted to validate the effectiveness of the proposed design method. Section VI draws a conclusion for this paper.


To aid visualization and completely understand the physical mechanisms of imperfect electrical connection in the flange mount devices, a photograph of a typical N-type flange mount coaxial connector is shown in Fig. 1. As can be observed in Fig. 1(a), the dimension of the flange mount surface is larger than that of the insulator. The flange mount surface is a square of a side-length 25.4 mm with an area of 645.2 mm2 , and the diameter of the insulator is 9.8 mm with an area of 75.4 mm2 . Accordingly, the area of the flange mount surface is approximately nine times larger than that of the insulator so that the imperfect metallic contact may occur in the flange mount surface with ease. This because the large flange mount surface could be slightly deformed as a result of manufacturing error, tightened with unequal torque on 4-mounting holes. Meanwhile, the outer conductor of the coaxial connector is the inner circle of the flange mount surface. The above two reasons lead to the imperfect metallic contact being easily occurred in the outer conductor of the N-type flange mount coaxial connector, and this phenomenon is further depicted in Fig. 1(b). On the left side of the flange mount surface, a small gap could exist between the flange mount surface and the corresponding connection female due to the deformation of the interconnected surfaces, resulting in the imperfect metallic contact of the N-type flange mount coaxial connector.

From the previous studies [6], [13], two critical factors are responsible for the PIM distortion generated by the imperfect metallic contact, i.e., the electro-thermal (ET) coupling and the variation of the nonlinear oxide (contaminant) films. For the ET PIM, the additional junction impedance emerges and increases with the imperfect metallic contact level, this causes significant self-heating of the connective junction in high-power microwave circuits. On the contrary, the material property, such as metal resistivity, is changed because of the self-heating. Therefore, the resistivity of the junction is nonlinear, and then the ET PIM is generated. For the oxide (contaminant) films PIM distortion, the self-heating accelerates the process of oxidation and increases the thickness of the nonlinear oxide films. Nevertheless, the additional junction impedance makes much more current through nonlinear oxide (contaminant) films, which further deteriorates the PIM level.

Specifically, as shown in Figs. 2(a) and 4(a), a method that designs a gasket on the outer conductor of the traditional flange mount surface has been proposed in industry to reduce the probability of the imperfect metallic contact. Generally, the width d and the height h of the gasket are designed ranges from 0.80 mm to 2.00 mm and 0.12 mm to 0.20 mm respectively.

Although the gasket method can enhance the connection reliability and reduce PIM distortion in the first few uses, the stability of repeated connections and disconnections in the course of service is unsatisfactory. This is due to the fact that, 1) the gasket is the main acceptor of the connection forces between the flange mount surface and the corresponding connection female. 2) the area of the flange mount surface is much larger than that of the gasket. These factors make it easy to have a plastic deformation in the corresponding part of the gasket under the conditions of over-standard tightening torque or requiring frequent connections and disconnections (the element after plastic deformation does not fully recover its original shape).

In summary, the gasket method can improve the connection reliability and diminish PIM level in the first few uses. However, when in the situations requiring frequent disconnection and reconnection, the gasket method may have more serious PIM distortion than the traditional N-type flange mount coaxial connector.


In an effort to cure the deficiencies of the proposed gasket design method, in this section, we will provide a modified ring method that is composed of two parts, namely the stress ring and the conducting ring. As shown in Fig. 2(b), the stress ring has the same size as the gasket in Fig. 2(a), the conducting ring is embedded in the stress ring as the outer conductor for the flange mount coaxial connector to transmit the signal. Nevertheless, as illustrated in Figs. 3(a) and 4(c-e), the conducting ring is divided into many ring petals by slots so that there is a small gap between two neighboring ring petals. Therefore, when a connection force is applied in Figs. 3 (c), and 4(e), the ring petals are bent in response to the contact pressure, and then the stress ring will be the main acceptor for the contact pressure. In other words, the imperfect metallic contact and plastic deformation can be avoided in the signal transmission component because the parts for receiving the contact pressure and transmitting the signals are separated (the conducting ring is employed to transmit the signal and only occurs elastic deformation; the stress ring is used to receive the contact pressure and may generates plastic deformation). In addition, the parameters design on the dimension and plating for the modified ring method is discussed as follows.

A. Dimension Design for the Modified Ring

Similar to the gasket in Fig. 2(a), the stress ring is also the main acceptors for the connection forces, therefore, the stress ring and gasket have the same dimension and material, and both need to be heat-treated to improve the hardness. In practical situations, the hardness of them ranges from 28 HRC to 32 HRC, here, HRC represents Rockwell C scale hardness. As shown in Fig. 2(b), the height and width of the conducting ring are l and w, respectively, which refer to the skin depth and plastic deformation of the ring petals. The reasons are summarized as follows.

1). Almost all the conducting current is concentrated in the inner side of the conducting ring on account of the skin effect. Hence, for the integrity of the transmission signals, the width w must be larger than that of the skin depth. For example, as the frequency of the transmitted signal is 30 MHz, the skin depth of brass can be calculated as 24.3 μm (resistivity: ρ=6.98×10-8 Ω/m, relative permeability: μr=0.99994). Therefore, the minimum width w of the Conducting ring should be greater than 24.3 μm.

2). With the same connection force, increasing the height l or decreasing the width w can increase the electric contact reliability. However, as the electric contact level or the deformation of the conducting ring exceeds their limits, the plastic deformation will occur. Therefore, the dimensions of the conducting ring are necessitated to enable the N-type flange mount coaxial connector tightly connected and avoid plastic deformation. In other word, the stress ring should withstand the contact pressure absolutely before the conducting ring is deformed with plastic bending.

Taking the designing principles above into account and considering the tightening torque for all four mounting screws is 3.0 N·m, the width w and the height l of the conducting ring are designed ranges from 0.15 mm to 0.30 mm and 0.25 mm to 0.40 mm, respectively.

B. Plating Design for the Modified Ring

Electroplating can significantly increase the electrical conductivity, corrosion protection, and wear resistance of coaxial connectors. As aforementioned, the skin effect makes almost all transmitted currents concentrated on the surface of the conducting ring, and the stress ring is the main acceptors for the connection forces. Therefore, it is important to plate the conducting and stress rings to enhance the conductivity and wear resistance, respectively.

From the aspect of the practicality and economy, the plating thickness of the conducting and stress rings are designed both from 20 uin to 50 uin (uin: micro inch, 0.50 μm to 1.25 μm). However, the stress ring is plated with nickel to improve the performance of corrosion protection and wear resistance. Two metals, gold and tri-metal alloys (55% Copper, 30% Tin, 15% Zinc), are selected as the plating materials for the conducting ring. Specifically, the plating metal of tri-metal alloys is used in a common sensitivity environment of the PIM distortion. Hence, for the applications, where high PIM sensitivity and electrical conductivity are required, the noble metal (silver, gold, and others) is the optimal choice for plating the conducting ring.


In this section, the transmission characteristics, including the S21-parameters, the contact impedance, and the transmission loss will be analyzed by simulations to investigate the modified ring structure impacts on the transmission performances for the flange mount coaxial connector. Figs. 3 & 4 show the structures of the simulation model. A voltage source is applied at the left terminal of the simulation model (Fig. 4(f)) to generate a Gaussian pulse excitation signal. At the other end of this model, a 50 Ω load is employed to match the characteristic impedance. Three different kinds of flange mount surfaces are considered, namely the traditional design method (Fig. 1(a)), the gasket design method (Fig. 4(b), and the modified ring design method (Fig. 4(c)). In addition, the side-length of flange mount surface is 25.4 mm, the diameters of the inner conductor and insulator are 3.0 mm and 9.8 mm respectively. The width d and the height h of both the gasket and the stress ring are 1.20 mm and 0.20 mm respectively. The width w and the height l of the Conducting ring are 0.15 mm and 0.30 mm.

In this paper, we will take the mobile communication system of GSM1900 as an example to analyze the PIM distortion in the N-type flange mount coaxial connector. The transmitter and receiver frequency bands for the GSM1900 range from 1930 MHz to 1990 MHz and 1850 MHz to 1910 MHz respectively. Two carriers, f1=1935 MHz and f2=1985 MHz, are selected as the excitation signal, and thus the third order PIM distortion product can be calculated as f3(PIM)=1885 MHz.

Figs. 5-6 show the simulated results of the S21-parameter, the transmission loss, and the contact impedance in the flange mount surface for the above three cases. it is important to notice that, the transmission characteristics of the modified ring method are not only in good agreement with that of the gasket method but also with that of traditional method. Not only that, we have further measured the S21 and S11 parameters for the three different types of flange mount connectors mentioned above, and the measurement results are shown in Fig. 7, which is confirm that all connectors used in measurements have the similar transmission and reflection characteristics.

Therefore, the results of both simulation (Figs. 5-6) and measurement (Fig. 7) indicate that the effect of the structural changes (traditional design → gasket design → modified ring) on the critical transmission characteristics can be ignored. In other word, it proves that the modified ring design method can enhance the connection reliability and stability, but does not degrade the performance of signal transmission.


For validations, the test setup is composed of a PIM tester, a device under test (DUT), and a terminal load (50 Ω). CCI PiMPro1921 is used as the PIM tester to generate excitation signals and display the reflective PIM values, and the output accuracy of the used PIM tester is 0.3 dB. The 50 Ω terminal load with the feature of low reflection PIM is employed to dissipate the transmitted power.

The DUT is essentially a micro-strip line and connects the PIM tester and the terminal load with two N-type flange mount coaxial connectors. As shown in Fig. 8, the connector on the right side of the micro-strip is a traditional N-type flange mount coaxial connector, however, the connector on the left side of the micro-strip is the employed test sample. Four types of samples, as detailed in Table I, are considered to evaluate the effects of the modified ring design on the PIM levels. It is important to notice that all test samples in measurements are brand new (so that, the effect of the oxide (contaminant) films on PIM distortion can be ignored), and the standard tightening torques for all four mounting screws are 3.0 N·m.

In experiments, the measurement conditions are set as shown in Table II, where, three connection cases of the standard, under-standard, and over-standard are considered in this work. The measurement on the third-order PIM results for the standard connection case is shown in Fig. 9. It is observed that, as the standard tightening torque is applied, the values of PIM distortion can be decreased up to 9 dB by designing the gasket or modified ring on the outer conductor of the traditional flange mount surface (comparing samples B, C with A), and the noble metal (gold) plating can further reduce the PIM distortion levels (modified ring D).

As shown in Table II, for the under-standard connection case, a slight imperfect contact is generated in the flange mount surface because the tightening torque applied to one mounting screw is insufficient (2.0 N·m). Fig. 10 shows the measured third-order PIM values for the under-standard connection. Comparing the measured results of the under-standard case with the standard cases, it is important to notice that the imperfect metal contact can deteriorate the PIM level (the PIM level of traditional A′ is higher than that in traditional A), but we can improve the connection reliability and diminish PIM level by adding a gasket or modified ring on the outer conductor of the traditional flange mount surface (the PIM distortions of samples B, B′, C, and C′ are almost on the same level).

For the over-standard connection case, the employed samples have been repeated connection and disconnection 20 times with the tightening torque 5 N·m, which means the plastic deformation has generated in the connection surface before the PIM test. Fig. 11 shows the third-order PIM results for over-standard connection case. It is observed that, the frequent connecting and disconnecting or over-standard tightening torque can significantly deteriorate the PIM level for the gasket method (Comparing the measured results of gasket B″ with gasket B). However, the PIM level of the modified ring method is almost the same as its original value (the PIM levels of modified rings C and C″are almost in the same range), this is due to the fact that the components for receiving the contact pressure and transmitting the signals are separated in the modified ring method, and thus the frequent disconnection and reconnection or over-standard tightening torque impacts only on the component of receiving the contact pressure, for the component to transmit the signals, the effect can be ignored.

Specifically, from Figs. 9-11, the differences between each two traces are larger than the measurement accuracy of the used PIM tester, and we can further find that the third-order intermodulation does not meet 3 dB/dB relationship with the input signal power, which can be explained by the fact that, a system is usually made up of linear and nonlinear components, the interaction between the linear and nonlinear elements of a system can dramatically transform the overall nonlinear behavior of the system from that of the nonlinear component in isolation [14], [15].


In this paper, an improved design for minimizing the PIM distortion in the flange mount connectors has been proposed. Both the detailed design and verification have been provided. Specifically, to meet the requirement of repeated connections, this design has added two components for receiving the contact pressure and transmitting the signals respectively.

From the investigation in this paper, the proposed design method can not only significantly decrease the PIM distortion level caused by imperfect metallic contact, but also increase the reliability and stability for the flange mount coaxial connector in the conditions of over-standard tightening torque or requiring frequent disconnection and reconnection. Furthermore, this work has the potential to extend for all flange mount devices in engineering.


The authors would like to thank Dr. Yihong Qi, for his helps in technical supports and in the manufacturing the test samples.

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PB2022.01 不对称电接触引起的无源互调失真分析

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Abstract— This article investigates the passive intermodulation (PIM) distortion induced by the asymmetric electrical contact. Based on the analytical model, it is found that the increased current path is the cause of the additional impedance, resulting in PIM distortion. To validate our theoretical analysis, different levels of asymmetric electrical contact are studied via simulation and experiments. The demonstrations not only confirm the validity of our theoretical findings, but also substantiate the simulations. To the best of our knowledge, this work is the first to identify the asymmetric electrical contact as a PIM source and discuss its underlying physical mechanisms of causing electrothermal (ET) coupling PIM.

Index Terms— Asymmetric electrical contact, electrical contact failures, electro-thermal (ET) coupling, passive intermodulation (PIM)



Passive intermodulation (PIM) distortion is a frequently encountered issue in microwave circuits and wireless systems. PIM phenomenon is caused by slight nonlinearities stemming from nonlinear material or nonlinear metallic contact. In the past decades, many physical mechanisms, namely electro-thermal (ET) coupling, ferromagnetic materials, tunneling effect, and field emission, are considered as PIM sources [1]–[4].

The ET coupling generally has not been considered as a dominant PIM mechanism in the traditional sparse frequency bands and low-power telecommunications [5]. However, with the further development of wireless technologies (e.g., high power, high frequency, and base station supporting 3G/4G/5G simultaneously), the ET PIM distortion, especially induced by electrical contact failures, needs to be addressed carefully.

In practical scenarios, the poorly soldered joints, oxidation, and corrosion of junctions in the courses of service, and minor deformations of the connection surfaces may lead to electrical contact failures in microwave circuits [6]. According to prior research [7], electrical contact failure increases the contact impedance of the connection surface. Typically, in high-power and high-frequency circuits, the increased contact impedance (additional impedance) will lead to significant self-heating. Furthermore, the material properties, such as metal resistivity, change as self-heating conditions vary. In other words, this bidirectional interaction between the electromagnetic domain (dissipated electrical power and the resultant self-heating) and the thermal domain (temperature rise and the consequent change in the metal resistivity), gives rise to temperature oscillations and resistivity variations. Therefore, the ET PIM distortion emerges due to the nonlinear contact impedance [8].

Specifically, electrical contact failures will increase the noncontact areas and lead to asymmetric electrical contact in the connected surface, that is, there are two important factors responsible for the ET PIM caused by electrical contact failures: one is the increased noncontact areas, while the other is an asymmetric electrical contact. In [9] and [10], PIM distortion induced by the additional impedance of the increased noncontact areas has been analyzed. In [11], the theories for ET PIM caused by the electrical contact failures have been studied, and a numerical expression was derived to calculate the PIM distortion related to the contact impedance. However, the impedance induced by the asymmetric electrical contact has been ignored, which renders the PIM distortion evaluated by the theoretical analysis insufficient.

In this article, we take a pair of faulty coaxial connectors as a case study to investigate the ET PIM distortion caused by the asymmetric electrical contact, and this work is organized as follows: Section II develops an analytical model of the asymmetric electrical contact, considering the case of coaxial connectors. In Section III, simulations are conducted to validate our theoretical analysis. In Section IV, experiments are conducted to check the goodness of the model and the consistency of the simulation results. Finally, Section V draws a conclusion of this article. In summary, the main contributions of this work are that it, for the first time, reveals the asymmetric electrical contact as a PIM source and discusses its underlying physical mechanisms, which will facilitate further improvements of the accuracy of PIM predictions and measurements related to the electrical contact failures.


A. Analytical Model for the Asymmetric Electrical Contact

To aid visualization and better understanding of the asymmetric electrical contact, a used coaxial connector sample is shown in Fig. 1, where the black solid/dashed lines enclose the actual contact areas of the female/male coaxial connectors. On the inner conductor of the coaxial connector, there are some small deformations. This makes the connected petals between the male and female coaxial connectors slightly unaligned, which increases the noncontact areas in the outer conductor and creates asymmetric electrical contacts in the inner conductor. In other words, the asymmetric electrical contact emerges and increases with the deformation levels of the connection surface.

As previously stated, the impedance is the dominant contributor to ET PIM, and a numerical relationship between the ET PIM and the impedance for lossy component has been developed by (33) in [8]. Therefore, the key to understanding ET PIM distortion caused by asymmetric electrical contact is to analyze the increased contact impedance, that is, when the associated physical mechanisms for the increased contact impedance are well understood, the ET PIM can be accurately calculated.

Fig. 2 shows the analytical model of this work, where two cases of symmetric and asymmetric electrical contact are considered to analyze the impedance characteristics in the connection surface. The total contact areas are the same in both cases, that is, A1 = A0 = B1 = B0 = C1 = C0, but one focuses on the symmetric contact (the left side of Fig. 2), while the other studies the asymmetric contact (the right side of Fig. 2). It is evident that the total lengths of the current paths in the asymmetric contact are longer than that in the symmetric contact. For example, the red solid line in the asymmetric noncontact area A1 is longer than that in the symmetric noncontact area A0.

From the classical electrical contact theory [6], the contact impedance increases with the length of the current path through the connection interface. Therefore, the asymmetric electrical contact creates more contact impedance than the symmetric electrical contact. Furthermore, the increased impedance is proportional to the level of asymmetry, which means the severer the asymmetry of the electrical contact is, the more additional impedance will be induced.

B. Simulations for the Asymmetric Electrical Contact

A simulation model of a typical 7/16 DIN coaxial connector, which is built in CST Microwave Studio, is employed to analyze the asymmetric electrical contact. As shown in Fig. 3, the length of the model is 20 mm. The inside diameter of the outer conductor and the outside diameter of the inner conductor are 16 and 7 mm, respectively. The thickness of the noncontact areas is 0.3 mm, and the asymmetric contact occurs at 10 mm from the right end. Materials for the contact and noncontact areas of the simulation model are white bronze (conductivity: 5.96 × 107 S/m) and air (εγ = 1.0059), respectively.

Four cases, namely the symmetric contact, small asymmetry, medium asymmetry, and severe asymmetry, are designed and implemented to investigate the increased contact impedance in different asymmetric contact conditions. Fig. 4 shows the simulation results for these four cases. Here, the variable

Z, which is the additional impedance, is the difference between a certain asymmetric electrical contact case (e.g., severe asymmetry) and the symmetric contact case when the peak impedance occurs. It is important to notice that, as there is a symmetric contact, the additional impedance

Z emerges and increases with the asymmetric contact level. Therefore, the simulation results correlate well with the analysis in the analytical model.

C. PIM Expression for the Asymmetric Electrical Contact

The ET theory has demonstrated that the ET PIM distortion originates from the nonlinearity of the impedance [8], Specifically, for the coaxial connector, the ET PIM can be written as

where k belongs to the natural numbers, Z is contact impedance of the connected interface, in(t) is the current through the connected interface, α is the temperature coefficient, and Tα is the ambient temperature. Rth.eq. is the equivalent thermal resistance, which is related to the thermal capacitance Cth, thermal resistance Rth, and carrier angular frequency ω, meeting the relationship as [12]

Typically, the third-order PIM frequencies are very close to the fundamental frequencies and thus are difficult to be eliminated by filters. Below, we will take the third-order PIM distortion as an example to understand the generation of ET PIM by the asymmetric electrical contact. Usually, the magnitude of the temperature coefficient α is in the order of 10−3, thus, the ET PIM distortion from the number of k ≥ 2 can be ignored, and then the third-order ET PIM distortion can be approximately expressed as

Furthermore, as the current signal in(t) is composed of two carriers, n 1, 2, with amplitudes In, frequencies fn, and angular phases ϕn, mathematically

where ωn = 2π fn , then the third-order ET PIM distortion generated by the asymmetric electrical contact can be further rewritten as

where Z0 is the contact impedance of the connected interface with the symmetric electrical contact and

Z is the additional impedance caused by the asymmetric electrical contact.


It has been analyzed and simulated in Section II that the asymmetric electrical contact induces an additional contact impedance, resulting in ET PIM distortion. In this section, experiments are conducted to verify the impacts of the asymmetric electrical contact on PIM distortion, and the measurements are made in the mobile communication system of GSM1900, that is, the transmitter/receiver frequency bands of the experiments range from 1930 to 1990 MHz and 1850 to 1910 MHz, respectively.

A 7/16 DIN coaxial connector is employed as the device under test (DUT), and different levels of asymmetric electrical contacts are achieved by embedding copper on the different locations of the inner or outer conductor surfaces. Since the height of the embedded copper is a bit higher than that of the outer/inner conductor surface, and therefore, when the male and female coaxial connectors form a connection, the contact areas are only consisted of the embedded coppers, which means the asymmetry can be controlled by changing the locations of the embedded coppers.

Furthermore, three cases of different symmetry have been designed in experiments, which are the symmetric contact [Fig. 5(a)], the medium asymmetric contact [Fig. 5(b)], and severe asymmetric contact [Fig. 5(c)]. They have the same contact area, but the symmetry is different, that is, the embedded coppers for the three cases are the same dimensions, but they are embedded in different locations (the total area of the embedded coppers is one-quarter of the apparent contact area of the 7/16 DIN coaxial connector).

As illustrated in Fig. 5, the reflected PIM testing technology is used for the principle of the PIM analyzer; in other words, the PIM tester first generates a dual-tone excitation signal ( f1 = 1935 MHz, f2 = 1985 MHz) to the DUT, and then the reflected third-order PIM values from the DUT are measured and displayed on the PIM tester.

Fig. 6 shows the measured and predicted results for the three asymmetric electrical contact cases in Fig. 5. Two conclusions can be drawn from Fig. 6: 1) the third-order PIM distortion is directly proportional to the level of asymmetric electrical contact (symmetric contact → medium asymmetric contact → severe asymmetric contact) and 2) the nonlinearity of the PIM distortion is also confirmed because there is not a fixed step between all the curves.

Meanwhile, it is important to notice that the predicted PIM value is lower than in measurement. This is due to the fact that, in practical scenarios, the connected surface may have other PIM source (e.g., electron tunneling effect), which has been ignored in the theoretical analysis. Furthermore, the PIM values of both measured and predicted are greater than that of the reference because when embedding the coppers, the real contact area of the connected surface is reduced. In summary, the experiments quantitatively and qualitatively demonstrate that the asymmetric electrical contact is a PIM source.


Although it is well known that the electrical connection failures generate the ET PIM distortion, it is not very clear how it works for asymmetric connection scenarios. In this work, the underlying relationship between asymmetric electrical contact and ET PIM has been studied. It is revealed that the asymmetric electrical contact could increase the path length of the transmitted current through the connection interface, and the increased current path in turn leads to the emergence of additional impedance. Furthermore, the PIM distortion was generated in response to the ET coupling caused by the additional impedance. This conclusion will facilitate improved prediction and suppression of the ET PIM distortion from the asymmetric electrical contact and can also be extended to other types of connectors or soldered joints.

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PB2021.10 JS-002标准的1Ω盘式电阻器全波建模

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Abstract –A 1 Ω disk resistor is specified in the CDM standard as the current sensing element. However, its transfer impedance is frequency dependent which is not considered in the standard. In this work, a full-wave model and a simple equivalent circuit model is provided to explain the root cause of the variation the transfer impedance of the 1 Ω disk resistor.

I. Introduction

When the pin or pad of a charged IC approaches an external metal object, and the breakdown voltage is exceeded a Charged Device Model (CDM) event occurs. During CDM testing, the discharge current of the CDM event is measured by a 1 Ω disk resistor sensing element that is located at the top of a pogo pin probe as described in the industry standard ANSI/ESDA/JEDEC JS-002 [1]-[3]. The resistance of this element is specified to have a value of 1.0 Ω ± 10% and a transfer impedance that does not have a deviation relative to the DC value greater than 3 dB up to 9 GHz [3]. The standard does not consider frequency variations of the transfer impedance when calculating the current from the measured voltage. This work investigates this assumption by characterizing the sensing element (1 Ω disk resistor) of a field induced CDM tester in the frequency domain. Additionally, a simple circuit model and a full-wave model are presented to explain the variation of the transfer impedance up to 27 GHz.

II. CDM tester

A. Discharge Circuit

The cross section of a CDM tester [3] is shown in Figure 1.

To charge the device, the field plate is brought to the specified charge voltage, then the pogo pin is lowered to contact the DUT pin. A spark is initiated and the current flows via the pogo pin to the 1 Ω disk resistor (Figure 2). The transfer impedance, properties of the oscilloscope and cable losses will determine the voltage that is displayed at the scope. The voltage is measured across the 1 Ω disk resistor from which the discharge current waveform is then calculated. However, the transfer impedance of the 1 Ω disk resistor is not constant over the frequency range and deviates from the DC value of the 1 Ω resistor [5].

B. 1 Ω Disk Resistor Measurement

As shown in Figure 2, the disk resistor consists of a resistive sheet on one side and a ceramic substrate made from beryllium oxide (BeO) on the other side that provides mechanical strength. In a CDM test head, the resistive sheet can be mounted downward (Figure 3a, resistive sheet towards pogo tip) or upward (Figure 3b, resistive sheet towards coaxial line).

Figure 4a shows a fixture to measure the disk resistor. The fixture is composed of two 50 Ω surface mountable connectors and a plate that aligns the disk resistor. The thickness of the plate was chosen to prevent any gap between the 50 Ω connectors and the surface of the disk resistor. The surface mount connectors were connected to ports 1 and 2 of a VNA and port extensions were performed up to the connector surfaces (Figure 4a). Figure 4b shows the definition of current and voltage of the two-port measurement setup (disk resistor setup measured with VNA). Knowing the S-parameter across the disk resistor, the transfer impedance of the disk can be calculated as in [6]:

As shown in Figure 5, the S21 and S12 of the disk are nearly identical which gives evidence for the accuracy of the measurement. However, the S22 and S11 are different (Figure 6). Port 1 of the measurement fixture (Figure 4) is toward the resistive sheet of the disk resistor, and port 2 is connected to the ceramic side of the disk. The reflection coefficient S11 is nearly flat but S22 has lower value at higher frequencies. The difference between S11 and S22 is important in understanding the CDM system behavior at high frequencies. Ringing was observed in the time domain discharge waveform if the substrate is mounted toward the pogo-pin but it reduced if the disk was flipped. The ringing will be discussed in Section IV of this paper. At low frequencies, the transfer impedance equals the disk resistance. Thus, the impedance measured with VNA should match the measurements obtained by an LCR meter (1 Ω @ 1kHz).

As shown in Table I, both LCR Meter (@ 1kHz) and disk measurements (Figure 4) show about 1 Ω for different orientations of disk (up to 1GHz). For each sample, both methods showed nearly identical low frequency values (Figure 7). At higher frequencies, the transfer impedance obtained using (1) is increasing with frequency (Figure 8) for all disks. Additionally, manufacturing tolerances lead to variations between disk samples. The behavior of the S21 can be explained using a simple circuit model in the next section.

III. Device Modeling

A. Simple Circuit Model

Although different disk resistors showed slightly different transfer impedance values versus frequency, they all behave similar (Figure 8). The transfer impedance of the disks increased with frequency from 1 Ω @ 1 MHz to about 3 Ω @ 20 GHz. This behavior can be explained by the influence of the ceramic substrate. It forms a short, 13 ps delay transmission line (see Figure 2) which acts as transmission line transformer and changes the match of the 1 Ω disk side to the 50 Ω system. The substrate has a relative permittivity of around 7. However, the structure is not easy to model in 3D due to possibility of higher order modes if they are excited. Only considering TEM modes, a simple circuit model is created in Advanced Design System (ADS) [7] to evaluate the influence of the short ceramic transmission line (Figure 9).

Based on the geometry and permittivity of the Beryllium Oxide (BeO) substrate, the characteristic impedance of the ceramic portion was calculated to be roughly 17 Ω. A 13 ps long 17 Ω lambda/4 transmission line transformer converts 50 Ω to transfer impedance of about 3 Ω at 20 GHz which can be calculated with (1).

This transmission line behavior explains the observed increase of S21 and transfer impedance. As shown in Figure 10, S11 is almost flat over the entire frequency range whereas S22 decreases with frequency as the short transmission line changes the match to 50 Ω. A comparison between measured impedance and calculated from the simple circuit model will be discussed in the next section.

B. Full-wave Model

The simple circuit model gives a qualitative insight into only the dominating effects, excluding the influence of the skin effect, higher order modes, and details of the geometry. A full-wave model can reveal additional details about the frequency-dependent impedance. Figure 11 shows the core elements of the full-wave model: the 50 Ω connectors, the geometry of the disk resistor, and two waveguide ports which are placed across the 50 Ω connectors. Two short 50 Ω connectors are placed on both sides of the disk. As shown in Figure 2, the 1 Ω disk resistor has a resistive sheet on one side and a ceramic carrier made of beryllium oxide on the other side. A thin resistive sheet material (this does not model skin effect) and BeO were imported from the library of CST Studio Suite [8].

C. Comparison Between Measurement and Simulation

Figure 12 and Figure 13 compares the magnitude and phase variation data for the measured, circuit model, and full-wave model of the 1 Ω disk resistor. Both models and the data agree on the increase of the impedance above 1 GHz and the peak around 20 GHz. This increase and the peaking may cause some error in the peak current measurement for CDM if the actual current contains relevant spectral content in this frequency range.

The fact that the simple circuit model and the measured data match up to 20 GHz can be seen as indicator that the short transmission line is the dominating reason for the observed increase in transfer impedance and the behavior of S11 and S22. The full-wave model predicted a higher peak value, 3.3 Ω relative to 2.6 Ω in the measurements (Figure 12 for resistive sheet down). The reason is not known, but as the frequency matches the other data one can be assured that the dielectric constant of the BeO was correctly estimated from literature data. The full-wave simulation shows additional resonant behavior around 25 GHz which is also seen in the measurements in the same frequency range. We have not investigated the field distribution at these frequencies within the full-wave results to identify the nature of these resonances. Furthermore, the transfer impedance of the disk may decrease at higher frequencies when skin effect starts to decouple the front and the back side of the very thin resistive sheet. As the authors do not know the exact thickness and material of the resistive layer, it is not known above which frequency the decoupling effect of the skin effect would reduce S21. The data indicates that this is not the case below 20 GHz, as the simple ADS model matches the measurement in its principle behavior. Our full-wave model is also not able to simulate skin effect as an infinitely thin electrical layer was used to model the resistive sheet. The metallization of the resistive layer may not be fully homogeneous. This would cause a current flow that is not radially symmetric. As known from current shunts, this would increase the mutual inductance between both sides of the resistive disk. Such a behavior is not observed which leads to a tentative conclusion that the resistive sheet is homogeneous within the boundaries of the analysis.

IV. Effect of Disk Orientation on CDM Event

To investigate the effect of disk orientation, both measured and simulated results have been compared in a CDM test setup.

A. Effect of Disk Orientation on Measured Discharge Current

CDM classification levels have been reduced [9] and that further reductions are to be expected. This will lead to a faster rise time in CDM. This, paired with faster I/O on ICs may lead to measurement problems in CDM testing due to the mounting direction of the disk resistor. To investigate the effect of disk orientation, CDM discharge tests have been measured using a 23 GHz bandwidth oscilloscope [10] with different orientations of disk resistor as shown in Figure 3. One disk resistor was used within one test head by flipping the orientation between tests to prevent any unwanted effects or variation in the test setup. Discharge data from multiple pogo-pins with different length and discharge currents have been captured for charge voltage of 500 V (Figure 14 through Figure 17).

As shown, all plots have a low frequency component around 1 GHz which is the main CDM discharge current. However, there are some high frequency components as well which create ringing waveform over the low frequency waveform. As shown, high frequency ringing was observed in discharge current when the resistive sheet of disk resistor was mounted upward (Figure 3b).

However, the ringing is weaker if the resistive sheet of disk resistor is mounted downward (substrate toward oscilloscope and the resistive sheet toward DUT as shown in Figure 3a). To isolate the ringing from the familiar low frequency response, a Maximum Overlap Discrete Wavelet Transform based Multiresolution Analysis (MODWT MRA) was used [11]. This method yields excellent decomposition and reconstruction while maintaining sharp edge definition and minimizing non-causality introduced by traditional high pass filtering. The high frequency ringing signal was found to be well isolated from the rest of the signal by using the db7 wavelet with a scaling factor of 2. Furthermore, the Wigner-Ville distribution [12] of ringing is used to visualize the time dependent frequency composition of the time dependent current.

The time domain signal, the power spectral density and time-frequency scalogram of ringing for different pogo-pins and for resistive sheet up and down is shown in Figure 18 and Figure 19. As indicated in timefrequency spectra of Figure 18, when the disk resistor is mounted upward for pogo pin length of 8.25 mm, 9.4 mm and 10.5 mm, there are two main high frequency component which make up the ringing with the corresponding interference term between the two main components.

However, in all time-frequency spectra of Figure 19, there is only one frequency component. Similarly, when the resistive sheet of disk resistor is mounted upward the power spectrum has two main frequency components for pogo pin length of 8.25 mm, 9.4 mm and 10.5 mm. Table II summarizes the two observed frequencies if the resistive sheet of disk is mounted upward (Figure 18).

Two sinusoidal signals are used in Figure 20 to reconstruct the ringing for pogo pin of 10.5 mm (blue curve in Figure 20) and is compared with the original ringing (red curve in Figure 20).

Therefore, it is possible to reconstruct the ringing by summing two sinusoidal signals e.g., f1 and f2 as shown in Figure 20. This motivates us to consider the nature of ringing and determine the physical agents which correspond to these responses.

Figure 21 shows the half wavelength versus frequency (blue curve) and is compared with the length of the pogo pins versus the first sinusoidal signal (f1) from Table II (black curve). As shown, the first sinusoidal signal (f1) is directly related to the length of pogo pin and can be calculated relative to the length of the pogo pin. The second sinusoidal component is related to the disk orientation. As shown in Figure 18 and 19, the second sinusoidal signal (f2) exist for resistive sheet upward for pogo pin 8.25 mm, 9.4 mm and 10.5 mm. However, this signal disappears when the resistive sheet is mounted downward. For the pogo pin 6.6 mm, two sinusoidal signals cannot be distinguished since f1 is very close to f2. When the resistive sheet of disk resistor in mounted downward (resistive sheet toward DUT), only one frequency can be observed in time-frequency spectrum of ringing signal (Figure 19) which indicate the effect of disk orientation.

B. Effect of Disk Orientation in Simulation

As shown in Figure 18 through Figure 20, two sinusoidal signals contribute to the high-frequency ringing of the CDM discharge current. A full-wave model is created for CDM test setup (Figure 22) to obtain a qualitative insight into the dominating effects up to 30 GHz. Two discrete ports are placed on both sides of the pogo pin providing the corresponding connection for co-simulation simulation in ADS which is shown in Figure 23. Measured S-parameters of the 1 Ω disk resistor from Section II or simulated S-parameter file from Section III can be imported into ADS model of Figure 23. It is also possible to use the simple circuit model of the disk resistor (Figure 9) into the circuit model of Figure 23. As shown in Figure 24 and Figure 25, if the orientation of the disk is changed, the high frequency ringing also changes. The first ringing in the discharge current relates to the length of the pogo pin which exists in the discharge current regardless of disk orientation. However, the second ringing corresponds to the disk orientation and will disappear if the resistive sheet of the disk is mounted toward the DUT (red curve of Figure 24 and Figure 25). If the substrate of the disk is mounted toward the DUT (blue curve in Figure 24 and Figure 25), the waveform has more ringing (high frequency contents).

The effect of disk orientation in simulated data (Figure 24 and Figure 25) is not as strong as the measured waveform (Figure 14 through Figure 17), but in principle they follow the same behavior, i.e., ringing is stronger if the ceramic substrate is mounted toward the DUT and gets weak if the resistive sheet is mounted toward the DUT.

It is known that the current measured at disk is not necessarily equal to the current at the DUT [13]. Ultimately, the current at the DUT is the stress that the device experienced. For accurate comparison between measured and simulated data in this paper, only current at the disk resistor was studied. Future work should incorporate current at the DUT to get a more accurate measurement of the stress that the device experiences.

A. Discussion

The fundamental question is how important is the frequency response of the transfer impedance of the disk resistor above 10 GHz?

Present ICs have data rates up to 50 GHz and more. Thus, their I/O can be damaged by high frequency content of every strong signal [14]. The charge voltages of CDM will be further reduced such that the rise times will further reduce [9]. Thus, the importance of the larger than 10 GHz spectral content will increase. Right now, CC-TLP testers can be based on a 40 ps or less transmission line pulser [14]. A 30 ps rise time equates to 10 GHz. To avoid problems in testing of future ICs and for comparing test methods, the analysis > 10 GHz is suggested.

V. Conclusion and Further Investigations

The frequency response of the transfer impedance of a 1 Ω disk resistor has been investigated through measurement, full-wave modeling, and a simplified equivalent circuit. The transfer impedance increases with frequency and shows a maximum of about 3 Ω at 20 GHz for disks mounted downward (resistive sheet toward DUT). However, the transfer impedance increases with frequency and shows a maximum of about 15-20 Ω around 20 GHz for a disk mounted upward (resistive sheet toward oscilloscope).

This is explained by considering the inner structure of the 1 Ω disk resistor. Only one side of the resistor’s ceramic carrier contains the resistive sheet material. Thus, it is asymmetric. The thin ceramic carrier creates a short transmission line. The effect of this short transmission line section is clearly visible in measurement, simplified and full-wave simulation both in S11, S22 and S21 data. It cannot match the 1 Ω but it strongly changes the match and causes an increase of the transfer impedance. The CDM current has been captured with different pogo pin lengths. High frequency ringing was observed. It can be explained as the sum of two sinusoids. The first sinusoidal signal was directly related to the resonance frequency of the pogo pin structure, i.e., its length and the second one was created due to the transfer impedance of the disk orientation.

VI. Acknowledgements

We would like to thank Dr. David Johnnsson and Dr. Timothy Maloney for their useful discussions and comments.

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PB2021.10 分析不平衡的两线或三线VHF LISN对交流电缆辐射发射的影响

下载PDF – 分析不平衡的两线或三线VHF LISN对交流电辐射发射的影响


Abstract—This article investigates using imbalanced two- and three-wire terminations for ac main cables, as suggested by the standard group. These terminations provide the basis for a new line impedance stabilization network (LISN) whose objective is to improve test repeatability between labs while also providing better estimation of real-world emissions. Standard balanced LISNs do not reproduce the imbalanced terminations seen in practice. An imbalanced two- or three-wire very high-frequency LISN was built, which can handle up to 15 A on each line. The LISN operates from 30 to 200 MHz and provides greater than 50-dB isolation between the input and output. The imbalanced termination allows the device to create a specified degree of conversion from differential-mode to common-mode current, which can increase radiated emissions. This conversion was evaluated to be as high as 12 dB in measurements of a power line communication device. 3-D full-wave simulations of two- and three-wire applications demonstrate that the radiated emissions from the prototype LISN and the ideal imbalanced termination are nearly equal. The new LISN was further evaluated to show promise for improving measurement reproducibility, reducing the standard compliance uncertainty by 6 dB in this study, from 15.5 dB in CISPR 16-4-1 to 9.5 dB with the LISN.

Index Terms—Common-mode impedance, radiated emissions, termination device, very high-frequency line impedance stabilization network (VHF LISN).

关键词:共模阻抗、辐射发射、终端设备、很高频线路阻抗稳定网络(VHF LISN)


Common mode conducted emissions are typically measured using a line impedance stabilization network (LISN) [1]–[9]. An LISN is a filtering device providing a) isolation of the device under test (DUT) from ac power lines and related radio frequency (RF) disturbances, b) a well-defined reference impedance at the LISN DUT port; and c) the necessary power to the DUT. Standard LISNs use a balanced termination structure [3]–[9]. Round-robin testing for radiated emissions show that the average emissions differ by 4 dB when using a traditional balanced LISN (see Fig. 1) [3], [4], but those deviations in measurements were as large as +18/−10 dB when the DUT was plugged directly into the building mains [3], [4]. Although a goal of the balanced very high-frequency (VHF) LISN is to reduce variations among tests [1]–[9], a balanced termination is rarely available in practice, so real-world emissions may be higher than seen in many standardized measurements.

The LISN forms an impedance between the wires of the power cable and the chamber ground and, thus, can be used as a common-mode absorption device above 30 MHz. If the common-mode impedance of the LISN is between 50 and 300 Ω, most of the common-mode resonances of the power cable will be suppressed. Suppressing these resonances reduces the dependence of the emissions on the power cable routing, the specific impedance of the chamber’s power connection, and the length of the power cord. While reducing this dependence is attractive for minimizing chamber to chamber variations, it also hides an important effect that causes radiation. In real installations, the differential-mode noise current is often larger than the common-mode noise current in a power cable, and real installations will have asymmetric common-mode impedances [10]–[12]. This asymmetry will convert differential-mode current into common-mode current, which can radiate. To mimic this effect, a defined asymmetry can be introduced into the VHF LISN.

Using an imbalanced termination will increase the common-mode emissions by about 10 to 15 dB up to 200 MHz (depending on the DUT) compared to using a balanced termination [11]. About 10-dB higher emissions were also reported for an imbalanced two-wire LISN compare to a balanced LISN over 0.5 to 30 MHz in [11]. To address the differential- to common-mode current conversion in a VHF LISN (30 to 200 MHz), the termination impedance should have a controlled imbalance to provide a defined degree of conversion from differential to common-mode current. The standard group introduced an imbalanced termination for this purpose and suggested that an LISN with similar performance should be created for the 30- to 200-MHz frequency range [10].

In this article, an imbalanced LISN with the characteristics suggested by the works in [10]–[12] was designed, built, and analyzed to serve as the termination of the mains power during radiated EMI CISPR16/CISPR 35 testing [1]. This LISN was designed in Section II to supply power for imbalanced two- or three-wire measurements up to 15 A over a frequency range from 30 to 200 MHz. In Section III, a 3-D full-wave simulation with both differential- and common-mode excitations representing the DUT was used to illustrate the effect of the VHF LISN on radiated emissions on a typical test setup for two- or three-wire application. A study of differential- to common-mode current conversion was performed to verify the conversion ratio for an ideal imbalanced termination. In a real test setup, the differential to common-mode current conversion is geometry dependent but not a fixed number. Measurements of a pair of power line communication devices were performed in Section IV to validate the performance of the LISN in a typical test setup and to demonstrate the level of differential- to common-mode current conversion for a real-word application. Discussions are presented in Section V. Finally, Section VI concludes this article.


The following section will introduce the imbalanced two-wire and three-wire terminations suggested by the working group and the literature [10]–[12], provide evidence of the suitability of the proposed impedances, show the characteristics of the actual LISN that was built to use these terminations, and give the value of differential- to common-mode conversion for a practical test setup connected to the imbalanced two wire termination.

A. Imbalanced Two- or Three-Wire Termination

The imbalanced two- and three-wire terminations proposed by the works in [10]–[12] are shown in Fig. 2(a) and (b), respectively. The termination characteristics for two-wire applications were specified as follows.

1) Common-mode impedance ZCM of 150 Ω ± 10% from 30 to 200 MHz, which defines the impedance between the line (L) and neutral (N) wires and the ground-plane, when the line and neutral wires are shorted together.

2) Differential-mode impedance ZDM of 100 Ω ± 10% from 30 to 200 MHz, which defines the impedance between the line and neutral wires when the neutral wire is shorted to the ground plane.

3) Impedance between the line and ground plane of 250 Ω ± 20% from 30 to 200 MHz.

The termination characteristics for three-wire applications were specified as follows.

1) Common-mode impedance ZCM of 90 Ω ± 10% from 30 to 200 MHz, which defines the impedance between the line, neutral, and protective earth (PE) wires (shorted together) and the ground plane.

2) Differential-mode impedance ZDM of 100 Ω ± 10% from 30 to 200 MHz, which defines the impedance between the line wire and the neutral and PE wires, when the neutral and PE are shorted to the ground plane.

3) Tertiary-mode impedance ZTM of 60 Ω ± 10% from 30 to 200 MHz, which defines the impedance between the line and neutral wires shorted together, and the PE wire and ground plane shorted together.

The working group [10]–[12] chose a 150-Ω two-wire common-mode impedance to suppress standing waves in the DUT power. The geometry of a power cable does not allow for easily assigning a common-mode impedance, as the wave structure deviates strongly from a TEM mode wave, but it has been shown that termination impedances in the range of 50 to 200 Ω suppress standing waves well [13]. Although not exact, using a common-mode impedance of about 150 Ω [see Fig. 2(a)] will provide results similar to those observed in [13] and minimal common-mode resonances will occur [13]–[15].

A 90-Ω termination was selected for the slightly thicker three-wire cables [10]. The 100-Ω differential impedance was chosen to mimic the impedance of a typical transmission line (TL) formed by the line and neutral wires [10]. To provide evidence for the validity of this selection, 48 different power cables were measured using a time-domain reflectometer (TDR) (see Fig. 3). Eleven were two wire cables, and 37 were three wire cables.

The impedance value was recorded between the short discontinuity at the beginning of the coax to cable transition and the end of the cable, which was left open. As shown in Fig. 3, a small adapter was made to connect the coax cable to the power cord, which causes a short discontinuity but does not affect the TDR measurement, as we record the differential impedance between the two lines after that discontinuity. The length of the cables is not important as we look at the differential-mode impedance provided by two wires (L and N).

The distribution of the characteristic impedances is shown in Fig. 4. The distribution shows the typical value of the differential impedance is close to 100 Ω, as suggested by the working group [10]–[12]. In the tertiary mode, the line and neutral wires are shorted and driven against the PE and ground (shorted). The line and neutral wires together as a larger “signal” conductor compared to the differential mode case, so the TL impedance is expected to be smaller. A value of ZTM = 60 Ω was chosen for this reason [10].

B. Prototype Imbalanced Two- or Three-Wire LISN

An imbalanced LISN was designed to meet the specifications of the working group. Additional requirements for the designed LISN are listed in Table I. Fig. 5 shows the LISN’s circuit diagram. The capacitor inductor networks in Fig. 5 (L1, C3, L4, and L2, C4, L5) were built to provide the required 50 dB of isolation of the DUT from the mains network at higher frequencies and provide a good connection to the building mains at 50 to 60 Hz. The capacitors C1 and C2 were made sufficiently small to isolate the line and neutral wires from each other and the PE at 50 to 60 Hz, but to allow resistors (R1, R2, and R3) to define the termination from 30 to 200 MHz. While the schematic in Fig. 5 should meet the specifications of the working group, validation is required since parasitics could alter the actual impedances looking into the LISN.

The six impedances specified by the working group could not be measured directly, since they require a floating measurement and different parasitics will be involved in each measurement. To determine the impedances, a combination of measurement and postsimulation was used. Three-port S-parameter measurements were made looking into each terminal of the LISN. A test fixture (see Fig. 6) was built to connect the LISN to the vector network analyzer for the three port S-parameter measurement. The measured S-parameter matrix was imported into advance design system (ADS) [16] to calculate the six specified impedances. The measured impedances and those suggested by the working group are shown in Figs. 7, 8, 9, and 10. The magnitudes of the measured impedances are all within the ranges proposed by the working group [10]–[12]. While the working group does not explicitly specify the phase, the measured phase is within about 30◦ of the ideal 0◦ phase for a resistive termination. More important than the variations in the actual impedance is its impact on the radiated fields. It will be shown in Section III that up to 30◦ variation in phase plus 10% variation in the magnitude of the LISN impedance will cause less than ± 3 dB variation in the radiated emissions, which is acceptable in EMC applications. These results suggest a ± 10% change in magnitude and ± 30◦ in phase is an appropriate limit for defining the impedance of an imbalanced VHF LISN.

C. Impact of Imbalance on Differential- to Common-Mode Conversion

An LISN is a filtering device providing the following:

1) isolation of the DUT from ac power lines and related RF disturbances;

2) a well-defined reference impedance at the LISN DUT port, which is isolated from the main network;

3) the necessary power supply to the DUT.

Looking from the DUT side, the common-mode impedance in the two-wire imbalanced LISN investigated is 150 Ω [see Fig. 2(a) and 13]. However, the common-mode impedance of a balanced LISN is about 50 Ω as seen from the DUT side. For both LISNs, the differential-mode impedance in the two-wire setup is 100 Ω [11], [12].

Testing without an imbalanced termination misses the important differential- to common-mode current conversion that may occur when the product is connected to a real ac mains network. The impact of the imbalanced LISN on differential to common-mode conversion was demonstrated using a 3-D full-wave model of a typical test setup. The model shown in Fig. 11 illustrates a typical radiation test setup [1]. The DUT is represented with a solid metal box (30 cm × 10 cm × 30 cm) located 1 m above an infinite ground plane. The box is connected to a 1.5 m power cable. The wires in the cable were driven with a 1-V differential source with zero-output impedance, as shown in Figs. 12 and 13. The sources were connected to the DUT chassis with a low impedance (10 Ω). This impedance is intended to represent a poor connection of a shield to the chassis. This connection was compared to a 1-Ω connection, which showed that this selection of the connection impedance does not significantly influence the conclusions drawn from the simulation.

A typical power cord geometry was used having a 1.62-mm wire diameter, a 0.89-mm-thick PVC insulation, and a PVC jacket with a diameter of 9.5 mm. The metal to metal distance between the wires was 2.35 mm. This distance forms a TL of about 80 Ω between the line (L) and neutral (N).

Circuit schematics of the full-wave structure with balanced and imbalanced terminations are shown in Figs. 12 and 13, respectively. The balanced or imbalanced terminations were chosen similar to those recommended for the LISN (see Fig. 2). The capacitance between the DUT enclosure and ground is about C ≈ 50 pF, depending on the size of the DUT. This capacitance creates an impedance of about 15 to 100 Ω from 30 to 200 MHz, which is on the order of the 150-Ω common-mode termination RCM, so that nonnegligible common-mode current could flow. Simple models without TLs and an estimated value of the coupling capacitance between the DUT and ground can be evaluated in [11]. Each wire is driven with an identical 0.5-V voltage source if opposite sign is creating a 1-V differential-mode source, which drives differential-mode current. As indicated in Fig. 12, there is no common-mode current when using a balanced termination, whereas the imbalanced termination will cause differential- to common-mode conversion of current (see Fig. 13), which will increase radiated emission. According to the works in [10]–[12], real installations have imbalances, which should be reproduced by the EMC test setup.

To calculate the amount of differential- to common-mode conversion, the full-wave model in Fig. 11 was simulated with an imbalanced two-wire termination (see Fig. 13) over a frequency range from 30 to 200 MHz, as shown in Fig. 14. The differential-mode current reduces with frequency since the 80-Ω TL is terminated into 100 Ω. Of course, for a different cable geometry, the differential-current (blue curve in Fig. 14) might be slightly different but that should not affect the current (< 10% variation) as long as the differential-mode impedance is between 80 to 100 Ω.

The common-mode current is affected by the structural length and fluctuates around 1 mA. The differential- to common-mode conversion can be measured by the ratio of the incident differential-mode power to the resulting power in the common mode as

The differential- to common-mode conversion ratio has been reported to be about −10 to −15 dB for an imbalanced CDNE-M [11]. The actual conversion ratio obtained through full-wave simulation, however, is somewhat geometry dependent and varies from −9 to −25 dB, as shown in Fig. 14. For a threewire application [see Fig. 2(b)], the maximum differential- to common-mode conversion was similarly evaluated to be about −19 dB. The conversion is smaller for three wires than two, because current will return not only via the ground plane, but also in the PE wire. The portion that returns in the PE wire does not contribute to the common-mode current.


To demonstrate the impact of the imbalanced LISN on radiated emissions, emissions were simulated using the fullwave model shown in Fig. 11. As shown in Section II-B, the impedances of the actual LISN vary about the ideal values due to unintended parasitics. Simulations were performed using the ideal LISN termination impedances and the realized values, as well as short and open terminations to show performance at the extremes. Table II summarizes all the settings used in the computer simulation technology (CST) Studio Suite. Simulation with the realized termination impedances was accomplished using the cosimulation feature of CST with the measured Sparameters. This feature combines the 3-D full-wave simulation with a circuit simulation or measurement [18] to simultaneously solve for the EM fields and the circuit characteristics. To ensure correct cosimulation, the following simulation procedure was used.

1) The setup shown in Fig. 11 was simulated with the ideal termination impedances represented as lumped elements [see Fig. 15(a)]. This simulation demonstrates the ideal performance of the imbalanced LISN and provides a reference for validation of the cosimulation approach.

2) A second simulation was performed using the ideal terminations with cosimulation [see Fig. 15(b)], where the excitation and the loads were replaced with S-parameter ports. Using the CST design studio cosimulation feature shown in Fig. 16, the excitation was connected to the source port and an S-parameter block representing the loads was connected to the load ports. An S-parameter block evaluated for ideal terminations [see Fig. 17(a)] was used to verify the procedure against the reference result from step 1.

3) After successful validation, the S-parameter matrix measured on the prototype was used to calculate the radiated emissions.

Radiated emissions were also evaluated for short and open terminations, when all the impedances on the termination side were replaced with open or short. The radiated emission was evaluated for all cases at a distance of 10 m. Results were evaluated for both common- and differential-mode excitations.

A. Common-Mode Excitation With Imbalanced VHF LISN

The schematic for the simulation setups with a common-mode excitation and ideal imbalanced two- and three-wire terminations are shown in Fig. 18. The maximum simulated far-field radiation for the three-wire setup with the studied terminations is shown in Fig. 19.

shown in Fig. 19. Strong resonances were observed for open and short terminations. The first peak is around 50 MHz, which is below the quarter wavelength frequency for a 1.5-m wire length, because the 50-pF capacitance between the DUT enclosure and the surroundings. At resonances, the radiation can exceed the radiation from the ideal termination by up to 15 dB. The 90-Ω commonmode termination impedance effectively damps resonances and in that regard seems reasonable with respect to repeatability. These results are in agreement with the previous study on the effect of common-mode impedance on radiation [2]. As shown in Fig. 19, the termination impedance is important at lower frequencies, but is not as significant at higher frequencies due to the increasing electrical length of the wire and the impact of damping due to radiation.

The black and blue curves in Fig. 19 show the results using the cosimulation technique and using standard simulations with ideal terminations. The two curves are nearly identical (< 1 dB difference). The green curve shows the radiated emissions using the measured termination S-parameters from the prototype. Comparing the blue and green curves, the radiated emissions from the real LISN is nearly equal to the radiation seen for the ideal termination case. Similar results were seen for the two-wire common-mode case [e.g., using terminations as in Fig. 18(a) and (b)]. The radiated emissions from the prototype LISN are close to the emissions from an “ideal” imbalanced LISN with less than 2-dB error up to 200 MHz (red curve in Fig. 19).

B. Differential-Mode Excitation With Imbalanced VHF LISN

Fig. 20 shows the differential-mode source excitation and the imbalanced termination in two- and three-wire setups. For both setups, the DM excitation was 1 V with 0-Ω output impedance. A low impedance (10 Ω) was selected to connect the wire to the DUT to represent a moderately poor connection to the enclosure. The radiated emissions from the two- and three-wire setups with differential-mode excitation are shown in Figs. 21 and 22, respectively.

When the ends of the wires on the termination side are open or shorted to the ground plane, the structures are symmetric. In this case, there is little common-mode current flowing in the circuit and very low radiation is observed. Large resonances are shown with open or short terminations because the source impedance is 0 Ω and there is little loss in the system. Resonances would be damped in this case with a larger source impedance. When using imbalanced terminations, there is noticeable differential to common-mode conversion for both the two- or three-wire case, which significantly increases the radiated emissions. As shown in Figs. 21 and 22, the results using cosimulation and using the standard EM simulation with ideal terminations are nearly identical. The difference between the radiation evaluated using the measured S-parameters from the prototype and using ideal terminations was less than a 3.2 dB up to 200 MHz (red curves in Figs. 21 and 22).

C. Tertiary-Mode Excitation With Imbalanced VHF LISN

balanced terminations for the three-wire setup. The excitation is 1 V with zero output impedance. The radiated emissions with a tertiary-mode excitation are shown in Fig. 24. When the wires are open or short, the structure creates a highly resonant system. In the presence of terminations, these resonances will be dampened, regardless of their source. The radiation of the prototype is very close to the radiation with an ideal termination, with less than 3-dB error up to 200 MHz (red curve in Fig. 24).

D. Impact of Termination Condition on Measurement Uncertainty of Imbalanced VHF LISN

The results of radiated emission measurements are affected by the uncertainties listed in [20] and [21]. This section investigates the impact and degree of influence of mains cable termination conditions on the standards compliance uncertainty (SCU) [20], [21]. The SCU is dependent on termination conditions over the frequency range where power cable radiation dominates [20]. Considering the tolerance of the termination impedance, the variation of the emission levels can be calculated, which also allows calculation of the measurement uncertainty influence [20].

The sensitivity of the radiation behavior of the LISN to deviations in the magnitude and phase of the terminating impedance from the ideal case should be analyzed to understand their impact on the SCU. Uncertainty is considered in the CISPR 16-4-1 standard [21]. Here, the average combined standard uncertainty (Uc-scu), including the terminating condition of the main cable, is defined to be

where CISPR/TR 16-4-1 specifies [19], [20] the following.

1) Uc,MIU, combined measurement instrumentation uncertainty, of 2.5 dB.

2) Ua, uncertainty from the main cable arrangement, of 3.5 dB. This value will depend on the termination conditions.

3) Uc, uncertainty in the operating condition of DUT, of 1.7 dB.

4) Ub, the uncertainty in termination conditions.

Assuming a rectangular probability distribution for the uncertainty of the cable terminating conditions, which is considered in CISPR 16-4-1 [21], the uncertainty in the terminating condition is given by [20]

where Emax and Emin are the maximum and minimum electric field strengths in dB µ V/m, respectively. If we consider the maximum deviation due to the termination condition of the prototype up to 200 MHz to be 3.5 dB (see Fig. 22 for a three-wire termination with DM excitation), the uncertainty in the terminating condition Ub is only 1 dB. Using (2), the average combined standard uncertainty (Uc-scu) is 4.7 dB. The expanded standard uncertainty Uscu, VHF-LISN is [20]

Compared to the 50-Ω LISN in [20] with an expanded standard uncertainty Uscu, VHF-LISN = 12˜dB, the expanded standard uncertainty of the imbalanced two- or three-wire VHF LISN has been improved by about 2.5 dB. Compared to the 15.5-dB uncertainty defined in CISPR 16-4-1 [21], the SCU for the imbalanced two- or three-wire VHF LISN is improved by about 6 dB. It should be noted that only a single device was studied here, and results may change with other devices.


The effect of the differential- to common-mode conversion was investigated using a power line communication device. The goal was to investigate the impact of termination conditions on emissions with a DUT that uses a strong differential-mode signal to transmit data over power lines [11], [12]. The test used different termination conditions, a balanced LISN, an imbalanced LISN, and no LISN. A balanced LISN (see Fig. 1) was prototyped to compare with the imbalanced LISN. The balanced LISN had a 50-Ω impedance on each line with less than 1.5-Ω variations in magnitude and less than 5◦ variations in phase over the frequency range from 30 to 200 MHz.

A block diagram of the measurement setup inside the semianechoic chamber is shown in Fig. 25. The two DUTs are HD power line adaptors (PLA5456), which communicate with each other through power lines. The measurement setup is shown in Fig. 26. The DUTs and LISN are mounted on the floor such that the power cable produces a loop with the maximum radiated emissions toward the antenna. A personal computer (PC) was needed to communicate with the DUT. To generate the highest differential-mode current, the DUT was operated under its maximum data rate. The measurement was performed for both horizontal and vertical polarizations and with 1- to 4-m scan heights of the antenna. The table was also partially rotated to capture the maximum radiation.

The goal was to show the differential- to common-mode conversion by using an imbalanced LISN, but also to show the impact of connecting the LISN to different power nets, as well as to show the impact of the power nets on emissions when no LISN was used. Connecting the LISN to different power nets helps to show if it has reproducibility issues. Different power networks were created by adding a soldering iron, a linear dc power supply, different wires with terminations, such as 2 nF, power cords, and strip lines, to the outlet inside the chamber.

Changing the power net before the LISN should have no effect, as the LISN isolates well. With different termination impedances, however, the radiation should change noticeably if no LISN is used. While different emissions are expected from a balanced or imbalanced LISN, both are expected to generate somewhat stable curves because both LISNs isolate the DUT from the power net. Higher radiation is expected using an imbalanced LISN rather than by using a balanced LISN, since the imbalanced LISN converts differential-mode current into common-mode current. Radiation results for all power networks and using three different termination conditions (balanced LISN, imbalanced LISN, and no LISN) are shown in Fig. 27. When both power line communication devices are ON, the broadband signal below 80 MHz is representative of the data transfer from the DUT. The DUT has no differential-mode energy above 80 MHz. Some observations are (a) when not using an LISN, the radiated emissions vary by up to 12 dB, since the termination is not controlled. (b) with a balanced or an imbalanced LISN, radiation has less than 3-dB variation, because the LISNs isolate the network and provide a well-defined termination. (c) the conversion with the imbalanced LISN is as high as 12 dB. (d) the imbalanced LISN generates emissions that are close to the worst of the measured emissions when connecting directly to the power networks, and (e) both LISNs have no reproducibility issues.

Neither impedance, nor conversion, has been characterized for the chamber used for measurement. Therefore, the observed variation in radiated emission is expected to be large ΔE > 10 dB. However, both balanced and imbalanced LISNs have controlled terminations and will not cause reproducibility problems because the data have less than 3-dB variation for different power networks. In general, the data show that for a device that has a strong differential-mode current, the imbalanced LISN brings the emissions to a more realistic level. The result from the balanced LISN ignores the differential- to common-mode conversion and gives unrealistically lower emission.

The conversion of course should correlate to the currents on the wires. The common-mode and differential-mode currents have been measured with a F65 current clamp at a few points along the cables. The maximum current has been captured and the conversion was calculated as the difference between the maximum common-mode current when the cable was terminated with balanced and imbalanced LISNs.

Similarly, the radiated emission conversion was calculated as the difference between the maximum radiated emission when the cable was terminated with balanced and imbalanced LISNs. Fig. 28 shows differential-mode to common-mode conversion, which is calculated from both current (blue curve) and radiated emission (red curve) measurement using balanced and imbalanced LISN. As shown in Fig. 28, the conversion calculated from radiated emission and the common-mode current are quite similar, i.e., this plot validates the conversion ratio with two different quantities, e.g., current, and radiated emissions. Above 80 MHz, the observed differences between the common-mode current for both balanced and imbalanced LISNs are almost zero because the DUT has no transmit energy. At the lower frequency band, the conversion is as high as 12 dB for both radiated emission and common-mode current.


Imbalanced LISNs can be designed for different target impedances. The LISN analyzed in this article was designed for a 150-Ω common-mode impedance, as suggested in the literature [10]–[12]. This impedance can strongly attenuate cable resonances [13]. Since actual power networks show strong resonances, one would underestimate the actual radiation at these frequencies. An alternative would be to design the LISN for a 25-Ω common-mode impedance. While this smaller impedance would strongly increase the radiation at resonances, there is no certainty that the resonances would occur at the same frequencies in the real installation since the actual power line impedances are unknown. A far-reaching design of an LISN might allow one to adjust the common-mode impedance along the Smith chart to identify the worst-case common-mode impedance for a given DUT. The impact of common-mode impedance on the radiation at resonances should be investigated in future.

Alternatively, it may be worthwhile to further study the PE line impedance in a variety of application areas, for example, in an urban area or in light industry area, and then adjust the LISN impedance according to the application.


An analysis of an imbalanced two- or three-wire VHF LISN was conducted in terms of its mode conversion and termination impedance. It was demonstrated that an imbalanced termination impedance provides a specified degree of conversion from differential to common mode, which can lead to more representative radiated emission test results. To ensure spectral emission control, an imbalanced LISN is needed. An imbalanced two- or three-wire VHF LISN was prototyped. The impedances in the prototype had less than 10% error in magnitude and 30◦ in phase compared to the impedances for an ideal imbalanced LISN, as specified by the working group. A 3-D full-wave simulation was performed to investigate the maximum radiation of a twoor three-wire setups using an imbalanced termination. It was demonstrated that the performance of the prototype leads to less than 3.5-dB error as compared to an ideal imbalanced LISN. In EMC applications, this error threshold is acceptable. It is therefore suggested that the impedance of an imbalanced VHF LISN vary by less than ± 30◦ in phase and ± 10%. For the main cable termination, the standard compliance uncertainty has been considered in CISPR 16-4-1 to be 15.5 dB. This uncertainty has been improved to about 9.5 dB for the proposed prototype. The differential- to common-mode conversion for an imbalanced termination was measured with two power line communication device to be as high as 12 dB considering both current and radiated emissions. Using different power nets inside an anechoic chamber, it was demonstrated that the chamber-tochamber reproducibility will be much better if an imbalanced LISN is used in every chamber.

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PB2021.10 CDM继电器POGO先接触CDM和CC-TLP脉冲的研究

下载PDF – CDM继电器POGO先接触CDM和CC-TLP脉冲的研究


Abstract – The recently proposed RP-CCDM testing method is tested alongside the more established CDM and CC-TLP methods on two test ICs to assess the RP-CCDM’s efficacy as an alternate test method. High bandwidth analysis of field induced CDM spark events is presented to evaluate higher frequency components of the current.

I. Introduction

A CDM event occurs when the pin of a charged device approaches an external metal object such that the potential difference exceeds the breakdown voltage of the air gap between them. CDM is one of the most common ESD threats in modern manufacturing and usage environments. The current industry standard testing method is the Field Induced CDM (CDM) method governed by the ANSI/ESDA/JEDEC JS-002 standard [1]. Current CDM testers are plagued with repeatability issues due to the variable spark resistance of the air discharge making the practice difficult to standardize [1, 2]. Additionally, decreasing CDM testing voltages increase the pulse-to-pulse variability of the air discharge, causing concern over the ability to meaningfully classify devices at lower voltages [3]. This is becoming increasingly problematic as the necessity for classification at lower levels is becoming greater with advances in IC technology [2]. Several contact-first CDM methods where a CDM current is induced into the pin through a more controllable method, such as the CC-TLP, LICCDM, and RP-CCDM, have been introduced in an attempt to solve the issue of pulse variability [4, 5, 6].

This work presents a correlation study between the CDM, RP-CCDM and CC-TLP testers on two devices with well-known CDM failure levels and failure mechanisms. The devices are subjected to a series of RP-CCDM and CC-TLP tests with multiple risetimes. The study aims to evaluate the efficacy of the RP-CCDM method and gain insight into the correlation of RP-CCDM and CC-TLP to better understand their potential as replacements for CDM susceptibility testing.

II. CDM and CC-TLP Tester Configurations

A. RP-CCDM Tester

The RP-CCDM, or Relay Pogo-Contact First CDM, is a design of the CDM discharge head that allows the use of a repeatable relay discharge while largely preserving the design parameters of the JS-002 standard. Figure 1 shows a cross section of the RP-CCDM head.

As shown in Figure 1, the RP-CCDM uses the field charging method and a similar discharge path to the one specified in the JS-002 standard. To charge the device, the pogo pin of the RP-CCDM ground plane is lowered to contact the DUT pin, then the field plate is brought to the specified charge voltage. To discharge, the reed switch is closed and the current primarily flows up the pogo pin, through a high bandwidth 1 Ω resistor, and returns via the ground to field plate and DUT capacitances. A more detailed testing procedure for the RP-CCDM is presented in [6].

The RP-CCDM prototype head used for stressing devices in this study was found to adhere to the discharge waveform parameters specified in the JS-002 standard. The RP-CCDM prototype was also found to have a strong correlation in peak currents to the peak values measured with a CDM head across a range of coins with varying CDUT values.

B. ACRP-CCDM Test Setup

The RP-CCDM and CDM test are different in two key aspects that could be the source of correlation issues. First, the RP-CCDM spark takes place in a controlled environment free of air. This difference results in a much more reproducible spark environment that reduces the variability of the peak current when compared to air discharge CDM and enables testing below 100 V [6]. The altered spark environment may also influence the risetime and result in less damping of the system due to a smaller series spark resistance value. Second, the geometry of the RP-CCDM head is different from that of the CDM to accommodate the reed switch. Specifically, the pogo structure is no longer uniform in thickness and longer than in CDM, which will affect the inductance of the discharge path. To further investigate the role of these two variables the “Always Closed” RP-CCDM (ACRP-CCDM) test method was implemented. This test method uses the existing RP-CCDM test setup but alters the testing procedure to close the reed switch in the pogo pin prior to descent such that a CDM-like air spark is created. This method removes the reed switch spark variable and reveals differences between CDM and RP-CCDM based on the test head geometry alone.

To evaluate differences in the rising edge, or any other part of the current waveform, RP-CCDM, ACRP-CCDM, and CDM tests were performed using a 23 GHz bandwidth Tektronix MSO72304DX oscilloscope and a low loss measurement chain. The insertion loss of the measurement chain, shown in Figure 2, was less than 2 dB up to the 23 GHz measurement bandwidth of the oscilloscope. The same model of disk resistor was used for the construction of both heads with the resistive sheet facing away from the pogo-pin, this type of disk resistor has been characterized up to 26.5 GHz in [7]. The DC resistance value was used for current measurement scaling.

Figure 3 displays the five highest peak current pulses captured from a set of fifty discharges on a small JS-002 verification module at TC500. These pulses represent the lowest spark impedance discharges for each tester. The initial rising edge of the CDM and RP-CCDM pulses is observed to be similar, although the CDM rising edge reaches a higher peak in the first 50 ps and the RP-CCDM reaches a higher peak in the first 80 ps. The ACRPCCDM current measurement has a rising edge more similar to that of the CDM pulse, possibly indicating a relationship between the rising edge and the air spark event, whereas for the rest of the measurement duration the ACRP-CCDM pulse matches the curve of the RP-CCDM current indicating a relationship with the test head geometry. The risetime of the RP-CCDM does not exhibit any characteristics that indicate a faster risetime than its air spark counterparts. The RP-CCDM slew rate may be faster on average, however, due to degradation in the CDM slew rate during discharges with high series spark resistance. Figure 5 displays the frequency spectrum of each pulse shown in Figure 3.

In [7], it was observed that the high frequency content seen in the CDM and RP-CCDM spectrum is likely related to the pogo pin length and the disk resistor. As shown in Figure 5, the high frequency content observed in the RP-CCDM spectrum is quite similar to the content seen in the ACRP-CCDM spectrum, indicating that the RP-CCDM relay spark does not introduce any unwanted resonances. Whether the current measurements in Figure 3 and the structure resonances seen in Figure 5 are indicating the true current magnitude that is traveling though the IC pin during a CDM stress is not yet fully understood but is currently being investigated. The presence of the high frequency current components that occur in field induced CDM events could be an important factor in determining the efficacy of alternate test methods on sensitive ICs.

C. CC-TLP Test Setup

The CC-TLP method utilizes a VF-TLP pulse into to a single IC pin and a capacitively coupled return path to create a CDM equivalent stress [4]. CC-TLP is a contact-mode tester and as such has the advantage of having much lower pulse to pulse variability than a standard CDM test with an air spark. The CC-TLP method also allows correlation between peak current levels and pulse width settings to CDM stress parameters which can be used to evaluate CDM type failure modes [8, 9]. In this study, two CC-TLP setups were used for testing. The first tester used to perform testing at IFX, uses a circular ground disk with a diameter of 5 cm. The length of the probe tip is adjusted to 0.3 mm [10]. A TLP system with 1 ns pulse width and 100 ps risetime is connected as excitation source. The second CC-TLP tester, manufactured by and used to perform testing at ESDEMC, uses a test head with a square, rather than circular, ground plate the same size as a JS-002 CDM tester’s ground plate. The length of the probe tip is adjusted to 0.5 mm. The bandwidth of both CC-TLP measurement chains were limited by the pick-tee cutoff at approximately 10 GHz. Both testers integrate S-parameter compensation of the measurement chain in software. The same pulse parameters were used for both testers. A “dummy” device was used to determine the charging voltage necessary to achieve the desired peak current on each pin of each device tested.

III. Correlation Study

A. Device Information

Two different test devices are used for the correlation study of RP-CCDM, ACRP-CCDM, CC-TLP and CDM in terms of the failure level. Both devices are designed in 130 nm CMOS technology. Device A is packaged in a TSSOP, device B as eWLB. The expected failure mode is the excess of a critical potential level leading to gate oxide damage at one or more transistors. The failure mechanism of device A is a GOX failure triggered by a cross-domain issue and is located at an internal interface in the core. Device B shows several GOX failures and increased IDDQ currents after the damage occurring at the transistors on the edge of the digital core.

B. Transmission Line Connected Pins

As observed in measurements on the JS-002 verification modules, the peak current of the RP-CCDM and CDM testers was measured to be nearly identical on a reference connected pin of the device as seen in Figure 6. However, this relation was found to not hold across all pins on device B.

The most sensitive pins on device B are high-speed I/O pins connected to the die via impedance controlled, transmission line (TL), traces, such as shown in Figure 7.

In Figure 8 two curves of a TDR measurement in a CC-TLP setup are shown. The probe tip of the CC-TLP test head is connected to the chip, so that the current path to the die can be analyzed such as shown in [11]. Once the current wave reaches the die, the capacitance formed by the package and die to the ground disk of the test head is charged and marks the end of the transmission path. This method enables to measure delay times of single pins. In case of a pin with a corresponding ball in the direct vicinity of the die pad the delay due to the transmission path can be neglected (Fig. 8, green curve). For the second pin the connected transmission line forms a stable impedance for about 120 ps (Fig. 8, blue curve).

The stress observed on these pins is paramount to determining the stress that the device can withstand. However, due to the high variability of air discharge CDM testing, it can be difficult to evaluate the difference between testers on these pins after a typical CDM validation test with only three discharges per polarity.

C. Peak Current Comparison of Pin Types

To evaluate these pins more accurately, a 100-pulse test was performed by stressing a reference connected pin and a TL pin 100 times each. All testers were tested at a 500 V field charge voltage to prevent any spark differences that may occur if the JS-002 voltage factor method was incorporated. The pogo pins and dielectric surface were cleaned with isopropyl alcohol prior to testing and the testing was performed below 10% relative humidity to minimize peak variation due to the air spark. Due to the charge distribution over the whole chip and high current levels with ESD devices operating in the on-state, no difference is expected in the discharge waveforms from before failure to after failure of the device. An additional CDM tester head with a replaceable pogo pin was incorporated to evaluate the influence of various pogo lengths on the observed discharge peak. This new test head was used alongside the RP-CCDM and CDM heads used in all device testing. The CDM head used for device testing is indicated as “large diameter” since it has a diameter of 1.5 mm compared to the new test head’s 0.4 mm pogo diameter. Table 2 displays the maximum peak current measured within the 100-pulse test for each setup and the relative percentage of the TL pin peak current to the reference connected pin peak current.

As can be seen in Table 2, there is a correlation between the length of the pogo pin and the discharge current ratio between the TL connected pin and the GND pin. For a given pre-charge voltage (with voltage factors applied such that the RP-CCDM and CDM peak currents match on JS-002 verification modules) where a CDM stress induces 5 A peak current on the studied TL pin, the RP-CCDM stress will induce a 5.7 A peak current. This additional current can be clearly seen in the measured currents shown in Figure 9, which was taken during a qualification test of device B. The cause of the increased peak current of RPCCDM with respect to CDM for the same pre-charge voltage on TL pins can be explained by the input impedance of the CDM head. Figure 10 displays the input impedance of the CDM heads used in Table 2 as measured in [6], denoted as ZDUT. Due to higher input impedance in the 600 MHz to 2 GHz range, where the majority of the spectral content is contained (Fig. 5), a larger reflection back into the device trace will occur in the case of the RP-CCDM. As discussed in [12, 13], the stress the die experiences is a result of the reflected pulse off this discontinuity. As a result, the stress a TL connected I/O receives will be greater for a CDM head with a higher input impedance, given a matching peak amplitude on a calibration coin.

D. Simulation of Transmission Line Pins using ZDUT

To determine if the measured ZDUT values alone could predict the difference, a simulation using the measured ZDUT data was done in ADS by Keysight. A simplified circuit model, developed in [12], was adopted to represent a CDM event on a TL pin where the current must travel through the impedance-controlled trace and encounter an impedance discontinuity at the pin/pogo-pin interface.

As can be seen in Figure 13, the ADS simulation produces the same relationship in measured current as the measured data. The current measured using the measured RP-CCDM ZDUT to represent the test head structure results in a higher current measurement on the TL connected pin. Figure 14 shows the current measured on the die side of the transmission line and indicates an increased current peak with the RP-CCDM head. Further development with a less simplified model of the TL pin case is necessary to determine the precise stress difference that occurs due to this effect.

IV. Failure Analysis Results

A. Device A Failure Results

Device A was tested using RP-CCDM, CDM, and CC-TLP testers. To test if that the failure levels of device A are risetime dependent, CC-TLP tests were performed using 100 ps and 300 ps risetimes. The determined failure levels of the device A are shown in Table 3 and Table 4. The devices were stressed at increasing test conditions until failure. The recorded withstand current indicates the highest current that all tested devices were able to withstand. Failure analysis on device A was carried out via DC leakage testing.

Table 3 and Table 4 display the failure levels for the device A. The RP-CCDM and CDM were observed to correlate well on this device, inducing failures at TC750. Additionally, CC-TLP setups at ESDEMC and IFX both induced failure at 8 A. Figure 15 displays a comparison of each tester’s discharge waveforms recorded at the failure threshold of device A. As seen in Figure 16, a clear jump in the leakage current is evident for each device stressed at its failure threshold.

B. Device B Failure Results

Device B was tested with the RP-CCDM and ACRP-CCDM at test conditions of 400 V, 500 V, and 625 V. Additionally, tests with CC-TLP setups were performed at 4 A, 5 A, and 6 A with a 100 ps risetime and 6 A, 7 A, and 8 A with a 300 ps risetime.

Failure analysis on device B is carried out via DC leakage testing and verified via IDDQ testing. The failure is expected for pre-charging voltages higher than TC500 on CDM and located on the edge of the digital core. The IDDQ analysis measures the current consumption in the quiescent state on 200 vectors in the digital core.

The quiescent current into VDD for all vectors is below 100 uA in case of an unstressed reference device. Slight deviations in this range are traced back to normal variations. A significant increase of the current compared to the reference device indicates a gate-oxide failure on the edge of the digital core. Significant deviations between vectors in the IDDQ sweep are also an indication of failure on the edge of the digital core.

Table 5 and Table 6 display the failure levels for device B. Figure 17 – Figure 20 display the IDDQ readouts indicating the failure thresholds for each tester.

As shown in Table 5, the RP-CCDM induced failures below the TC500 withstand voltage of the device on a CDM tester. Figure 21 displays the measurement of the largest amplitude stress discharge for the CC-TLP, ACRP-CCDM, and RP-CCDM stress sets at 5 A, TC500, and TC500, respectively.

As shown in Figure 21, the ACRP-CCDM and RP-CCDM have similar pulse shapes and amplitudes on the sensitive I/O pin studied previously and produce failures at the same test condition. The RP-CCDM IDDQ sweep shows a more larger failure, which may be due to the more controlled spark environment and therefore slightly higher peak currents. Both the RP-CCDM and ACRP-CCDM testers produce increased amplitude pulses on TL pins when compared to the CDM tester due to the higher input impedance as discussed in detail in section III. The failure of both the ACRP-CCDM and RP-CCDM to correlate to the CDM at TC500 indicates that the geometry of the test head is likely responsible for the early failures on device B, rather than the spark event in the relay environment. The geometry contributes to a higher stress in the case of ACRP-CCDM and RP-CCDM due to the TL pin effect studied in section III.

As shown in Table 6, the peak current failure thresholds of both CC-TLP testers correlated well with each other by producing repeatable failures at 5 A peak current with a 100 ps risetime pulse and at 8 A with a 300 ps risetime pulse. It was observed during the correlation study that a failure at 5 A could not be reliably achieved until the risetime of the incident TLP pulse at the CC-TLP probe port was slightly decreased and approached 90 ps on the ESDEMC tester. This observation reasserts that the risetime of the stress is a critical stress parameter of device B and that the exact risetime of the incident TLP pulse is an important factor to consider when correlating CC-TLP systems.

V. Conclusions

In this study, the RP-CCDM test method was evaluated in comparison to the CDM and CC-TLP test methods using high bandwidth measurement and spectrum analysis, input impedance measurement and circuit modeling on TL pins, and device failure analysis on two devices.

It was shown that a longer pogo pin can induce a larger amplitude current discharge on a TL pin, given a matched peak current on a reference pin, due to the larger input impedance seen at the pogo-pin/device pin interface. This effect was replicated using a simplified model in ADS.

The RP-CCDM showed perfect correlation to CDM stress tests on one device, but consistently showed failures at a lower threshold on a second device. Although construction and excitation sources of both CC-TLP testers are different, they correlated well with the failures induced by the CDM and were helpful in indicating whether risetime was a critical stress parameter of the test devices.

The RP-CCDM was also used to perform air discharge tests, when the relay in the pogo-pin was closed during the entirely of the test and resulted in failure levels that matched RP-CCDM results. These results indicate that the RP-CCDM structure is likely responsible for the early failures on the second device due to the increased currents induced on TL pins. Analysis of the spectra between CDM (air spark) and RP-CCDM (relay spark) suggest that there is no significant increase in spectral content other than that caused by as more stable, low impedance spark. This observation suggests that the RP-CCDM may represent a “worst-case” air spark, that is the spark that would occur between two very clean surfaces at low relative humidity. More testing and statistical analysis of the RP-CCDM is necessary to make a conclusion about the “worst-case” analogy.

VI. Acknowledgments

The authors would like to thank Dr. Kai Esmark of Infineon Technologies AG for providing the testing devices, for his support regarding the failure analysis and for sharing his wide knowledge of ESD, and in particular, of CDM. The authors would also like to thank Michael Reardon of ESDEMC for his assistance and input during the CC-TLP testing portion of this study.

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1)负责电路板的PCB Layout设计。














1、 工作内容:








2、 能力需求:









1、 工作内容:









2、 能力需求:








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PB2021.08 松散电接触对无源互调干扰的影响机理分析

下载PDF – 松散电接触对无源互调干扰的影响机理分析

摘要 抑制无源互调干扰是确保新一代移动通信系统安全、稳定和经济运行的重要前提,也是推进我国电信基础设施共建共享的重要保证,对无源互调干扰的产生机理进行分析是抑制其干扰产生的最根本性手段。本文综合性地阐述了金属松散电接触对无源互调干扰的影响机理,包括金属电接触表面的微观特征分析、松散电接触等效电路模型建立、松散电接触面电流密度和阻抗等电特征量对互调干扰作用机制等内容。理论建模、软件仿真以及实验测试表明:松散电接触导致增大的面电流密度与接触阻抗是产生无源互调干扰的直接原因。

关键词 无源互调干扰、松散电接触、同轴连接器、接触阻抗、新一代移动通信系统


无源互调干扰 (passive intermodulation, PIM) 是指两个或两个以上的载波信号在通过无源器件时由于无源器件的微弱非线性所导致的一种谐波干扰现象 [1] . 所谓无源器件是指微波电路或通信系 统中的连接器、衰减器、耦合器和馈线等一类无需功率源驱动工作的器件关于无源互调干扰的产生过程可参见如图 1 所示的简化模型在无源器件的输入端施加一双载波信号假设其载波角频率分别为 ω1, ω2, 由于器件的非线性影响在该器件的输出端将产生新的无源互调干扰频率成份其中无源互调的阶数 N 定义为 N = |m| + |n|; 式中 m, n 分别为 ω1, ω2 的系数例如 2ω1 − ω2, 2ω2 − ω1 均表 示三阶无源互调干扰, 3ω1 − 2ω2, 3ω2 − 2ω1 均表示五阶无源互调干扰其他阶数的无源互调定义依次类推.

关于新增无源互调频率成份的具体来由及其量级大小的表述方式可参阅文献 [2], 此处不再详细 描述观察图 1 所示的无源互调产物可以发现三阶互调频率成份距离载波频率 ω1, ω2 不易设计滤波器滤除且其量级高对载波信号干扰最强因此三阶互调成份是抑制无源互调干扰的重点故本文的研究工作也主要围绕三阶无源互调干扰展开.

1.1 无源互调干扰的危害

早些年由于地面移动通信系统的功率和频率密度相对较低因此关于无源互调干扰的报道常 见于远洋船舶、卫星等需要进行大功率甚至超大功率通信的应用场合中[35] . 近年来随着地面移动通信系统的工作功率、通信频带宽度的不断提高以及电信基础设施共建共享水平的不断深入新一 代移动通信系统对无源互调干扰的敏感程度越来越高具体可表现为以下两个方面.

1.1.1 无源互调干扰对电信基础设施共建共享的危害

2013 年中华人民共和国工业和信息化部和国务院国有资产监督管理委员会联合出台了《关于推进电信基础设施共建共享的实施意见》并倡导成立了 “中国铁塔股份有限公司”, 大力推进我国的电信基础设施的共建共享水平 [6] . 电信基础设施的共建共享可带来 3 方面好处可避免电信基础设施的多次重复投资和资源耗损有利于网络资源的合理配置便于施工维护和降低运维成本 [7]; 但不同的电信运营商 (例如中国电信、中国移动、中国联通和不同代通信系统 (例如: 2G/3G/4G/5G) 共享同一电信基础设施将带来严重的多系统间无源互调干扰问题[8] . 此处以中国移动与中国电信、联通两大电信运营商的 2G 通信频段为例进行说明其系统间无源互调干扰如表 1 所示 1 中仅仅列举了中国移动与中国电信、中国移动与中国联通在 2G 频段内相互之间的无源互调干扰忽略了中国电信 与中国联通之间在 2G 频段内的无源互调干扰也忽略了中国移动单个运行商的不同代通信系统之间 的无源互调干扰更是忽略了不同电信运营商多代通信系统之间的无源互调干扰因此在电信基础设施共建共享带来诸多便利的同时各通信系统间的无源互调干扰是亟待解决的难题迫切需要从根本上抑制无源互调干扰的产生.

1.1.2 无源互调干扰对新一代高功率通信系统的危害

第五代移动通信系统的工作功率约为第四代移动通信系统的 3 [9] , 而无源互调干扰的量级 与通信系统的工作功率成正比例关系那么意味着在 2G/3G/4G 等传统移动通信系统中原本相对微 弱、不易被通信设备接收端捕获的无源互调干扰信号其量级在新一代移动通信系统中将成倍数增长本小节以移动通信系统中使用最为广泛的 SMA 同轴连接器为例对其输入功率及其在此输入功率条件下对应产生的三阶无源互调值进行测试其结果如表 2 所示依据表 2 的分析结论当输入功率增加约 4 倍时其对应的三阶无源互调干扰值将增加约 100 换言之同等条件下第五代移动通信系统的无源互调干扰将比第四代移动通信系统增加约 100 此特征亦要求在新一代高功率移动通信系统中必须从根本上抑制无源互调干扰的产生.

综上所述不管是新一代移动通信技术的广泛推广还是电信基础设施共建共享的顺利实施 要求从根本上抑制互调干扰的产生其关键还在于明晰无源互调产生的确切机理.

1.2 松散电接触影响机理分析的现实需求

无源互调现象最早于 20 世纪 60 年代在远洋船舶卫星通信系统中被发现多年的研究积累使得在高空、大功率通信系统 (如卫星通信等国内外有不少成功应用的先例 [10, 11] . 近年来随着地面电信基础设施共建共享的实施以及新一代移动通信系统的功率、频率和元器件集成度的不断提高新一代移动通信系统的无源互调干扰问题成为一个新兴的研究领域例如: 2015  6 首届移动通信无源互调讨论会在西安交通大学举办; 2015  8 在杭州召开了移动通信多系统合路无源互调 ( 统间互调测试的首次研讨会此类研讨会很好地促进了我国移动通信无源互调干扰问题的交流和科 学研究水平但由于此领域研究的开展时间不长仍有较多问题未能涉及松散电接触便是其中之一同时不同于高空卫星通信设备近乎苛刻的生产制造环节和终生免维护性地面移动通信系统在使用 过程中通常需要多次调试和周期性维护因此易造成金属连接器件的疲劳和电接触表面的轻微形变同时空气环境中金属的氧化、硫化与污染现象都使得电连接故障难以完全避免.

此外不同于传统移动通信系统新一代移动通信的频率成倍数增长例如: 2G/3G/4G 等传统通信系统最高工作频率均不足 3 GHz,  5G 通信系统的实验频率为 28 GHz (北美), 那么意味着对信号传输载体器件或电路的电连接情况提出了更加严格的要求传输信号的频率越高金属的趋肤效应会 使信号电流越来越集中在传输载体的表面例如金属铝的趋肤深度与频率关系如表 3 所示当金属铝传输的信号频率从 103 Hz 增加到 109 Hz 实际传输信号在金属铝表面深度从 2.59 mm 降低到 2.59 µm, 对于 5G 移动通信系统常采用的 28 GHz 实验频率金属铝的有效信号传输深度仅为 0.49 µm. 这说明高频率产生的趋肤效应使得信号电流在传输器件的实际有效区域十分狭小那么意味着信号 传输器件的轻微松散电接触对传输信号完整性的影响将是致命性的.

因此本文专门针对松散电接触的无源互调影响机理开展研究具体的组织结构如下 2  先对电接触金属表面的微观特征结构进行分析然后从无源互调的产生角度建立良好 (紧凑电接触 电路模型以第 2 节的分析结论为依据 3 节从宏观和微观两个角度分别建立松散电接触的稳态 和动态模型指明发生松散电接触时金属交界面的电特征量将如何变化 4  5 通过软件仿真与实验测量相互佐证本文所提出的研究结论 6 节对全文进行了总结.


同轴连接器作为微波电路中使用最为广泛的元器件之一是移动通信系统中产生无源互调干扰的关键原因 [12] . 其应用环境的氧化与硫化现象、工业制造的微小误差、多次重复使用导致连接器交界面的轻微变形以及不恰当连接扭力都会造成同轴连接器发生松散电接触现象因此本文以同轴连 接器为研究对象来分析松散电接触的无源互调干扰产生机理.

2.1 金属电接触表面微观结构特征

参照图 2(a)  (b), 一对同轴连接器通常由母头和公头两部分组成 [13] . 外力通过扭力扳手旋转公头的螺纹控制公头和母头的连接程度当扭力扳手发出 “滴答” 声后表示公头和母头已实现紧凑连接此刻则停止旋转扭力扳手当存在松散电接触时 (如图 2(c)), 同轴连接器的公头和母头不能完全对齐进而导致同轴连接器电连接的真实接触面积小于理论接触面积使同轴连接器交界面的电特征 参数发生改变为明晰松散电接触的电特征量变化与无源互调干扰的内在关联本小节首先对金属电接触表面的微观特性进行分析然后建立金属紧凑电接触等效模型为后继研究铺垫基础.

参照图 3(a), 在微观视觉下同轴连接器的金属表面并不是绝对的光滑而是由许多微小凸起尖峰和凹陷区域组成[14] . 同时同轴连接器曝露在空气环境中其表面会形成一层绝缘膜层 (氧化层、硫化 物等污染物统称). 那么当图 2 所示的连接器公头和母头在外力作用下形成物理连接时金属接触面中一部分高度较高的凸起尖峰会刺穿绝缘膜层形成直接的金属 – 金属 (metal-metal, MM) 型连接 一部分高度适中的凸起尖峰没有刺穿绝缘膜层进而形成金属 – 绝缘膜 – 金属 (metal-insulator-metal, MIM) 型连接最后一部分高度较低的凸起尖峰或凹陷区域没有接触到绝缘膜层对连接器传导情况没有任何影响所以此部分情况不做考虑. MIM 型与 MM 型的接触机理模型如图 3(b) 所示需要注意的是在建立如图 3(b) 所示的接触机理模型时进行了一种等效转化处理将两个粗糙程度近 似相同的金属接触面等效为一个绝对光滑的金属接触面和一个粗糙程度在原来基础上加大两倍的金属接触面 [15] . 那么等效的 MIM 型和 MM 型接触机理模型可用图 3(b)(2) 进行描述.

 3(b) 金属接触表面以及覆盖的绝缘膜层采用弯曲实线表示电流线方向及其路径采用虚线 箭头表示此外 3(b)(1) 也给出了 MM 型接触和 MIM 型接触两种连接类型的电流传导示意图 发生 MM 型接触时微小尖峰刺穿绝缘膜层形成直接的金属与金属之间的连接电流直接由接触表面 A 流向接触表面 B; 当发生 MIM 型接触时微小尖峰没有刺穿绝缘膜层换言之接触表面 A 的电 流是透过绝缘膜层而到达接触表面 B 氧化物和污染物形成的绝缘膜层是一种非线性材料因此 MIM 型接触是导致无源互调干扰的一个重要原因 [16].

2.2 紧凑电接触等效电路模型

综上所述无论是 MIM 型接触还是 MM 型接触在微小尖峰形成的连接结附近处电流线都会 发生收缩现象导致电流线路径变长和电流密度变大将产生收缩电阻假定 MM 型接触产生的收缩 电阻为 Rmm, MIM 型接触产生的收缩电阻为 Rmim. 此外 MIM 型接触中除收缩电阻外绝缘膜层还会有额外的电阻 Rf 和电容 C f . 同时如图 3 所示两金属表面相互连接时还存在较多的未接触区域且该未接触区域为两金属表面绝缘膜层的狭小缝隙根据其电学特性可将未接触区域等效为一 电容 C v. 那么 3(b) 所示的紧凑接触机理模型可用图 4 所示的电路模型进行等效.

 4 参量: Rtf , C tf  Rt−mim 分别表示同轴连接器整个理论接触面积内所有的 MIM 型接 触总的绝缘膜电阻、绝缘膜电容以及收缩电阻, Rt−mm 表示整个理论接触面积内所有的 MM 型接触 总的收缩电阻. I 0, I 1, I v  I 2 分别表示紧凑连接时通过同轴连接器交界面的总电流、通过 MIM 型接触支路电流、通过非接触区域的电流和通过 MM 型接触支路电流同时由于微小尖峰所形成的 导电连接结仅为金属接触表面面积的一小部分因此未接触区域等效电容 C tv 的容抗将远大于 MM 型接触阻抗 Rt−mm  MIM 型接触总阻抗 Zt−mim, 故电流 I v 的大小可以忽略不计那么在图 4 可将 C tv 所在的支路看作断路同时在紧凑连接条件下由于 MM 型接触形成的连接结较多所以 MM 型接触的总接触电阻 Rt−mm 远小于 MIM 型接触的总阻抗 Zt−mim, 那么 4 中电流 I 2 要远大于电流 I 1, 而电流 I 1 为通过绝缘膜层电阻 Rtf (非线性电阻会导致无源互调干扰的电流因此在低功耗、紧凑连接的情况下同轴连接器中由于交界面电接触原因所导致的无源互调干扰的量级几乎可以忽略不计.


 2 节阐示了金属电接触表面的微观结构特征并在此基础上建立了紧凑电接触的等效电路 释了在低功率、紧凑连接条件下电接触对无源互调干扰影响水平低的内在原因本节将以第 2 节的研究结论为依据并拓展到松散电接触情况下分别建立松散电接触的静态与动态模型为阐示松散电接触情况下两同轴连接器交界面的电特征参量变化提供分析依据.

3.1 松散电接触静态模型

在叙述静态模型之前需要提前声明的是为便于松散电接触程度的可控性本文所选用的同轴连接器没有固有的电连接故障即金属接触表面不存在轻微形变或受力不均匀等情况换言之所有 的松散电接触情况均通过控制连接器公头和母头的松紧连接程度实现同时本文不管是建立松散电接触的静态模型还是动态模型均是以紧凑连接为基础进行论述的因此在详细阐述静态模型之前先简要介绍紧凑电接触情况如图 5(a)(1) 所示红色倒三角形表示紧凑接触位置在实际应用中 以通过扭力扳手实现旋转扭力扳手当扭力扳手发出 “滴答” 声响时即表示此位置为紧凑接触位置对应的紧凑连接理论接触面积如图 5(a)(3) 所示即为两同轴连接器交界面的面积当将图 5(a)(1) 所示的紧凑接触位置逆时针旋转 θ 角时即出现图 5(a)(2) 所示的松散电接触情况根据逆时针旋转 θ角度的不同可实现不同程度的松散连接.

本节所定义的松散电接触静态模型是指同轴连接器处于某种特定程度的松散连接时 (例如: θ = 60所呈现的静止连接状态其关注的重点是特定程度松散连接所处的稳定状态而不是由紧凑连接到松散连接微观表面导电结 ( 3(b) 所示所发生的动态变化 5(a)(2)  (a)(4) 描述了松散连接程度为 θ 时所呈现的电接触情况可知当发生松散电接触时同轴连接器交界面将出现非接触区域且非接触面积随松散电接触旋转角 θ 的增大而增大.

由于同轴连接器的外导体是主要的接触力承受区域因此此处仅图示外导体的松散电接触情况如图 5(a)(4) 所示存在松散电接触时连接器的理论接触面积内会出现非均匀、不连续的接触与非接触区域当电流线由同轴连接器公头通过松散电接触交界面流入到同轴连接器母头时在连接器公头均匀分布的电流线在到达非接触区域时将发生偏折汇聚到接触区域再流入同轴连接器母头 ( 5(b) 所示). 电流路径在非接触区域的偏折、收缩效应会带来 3 方面不利因素首先电流线在接触区域的收缩、汇聚会使接触区域电流密度增大其次接触区域的电流密度增大会加大金属导体对电流的阻碍作用导致接触电阻增加最后电流线偏折现象会使电流路径变长在高频情况下会诱发额外的感抗 (电阻和感抗在后文中将统称为阻抗).

3.2 松散电接触动态模型

松散电接触的静态模型可以方便地解释处于某种特定程度松散电接触时同轴连接器交界面的电流密度、阻抗等电特征参量相对于紧凑连接所发生的整体变化但是该静态模型不能解释发生松散电接触时所发生变化的电特征参量相对于图 4 所描述的电路所处的具体位置不能明确同轴连接器交界面内的 MM 型与 MIM 型微观导电连接结在松散电接触过程中的动态变化情况为此本小节将建立一种松散电接触的动态模型用以描述在发生松散电接触的过程中连接器交界面导电结(MM  MIM 的微观动态变化情况.

在设计动态模型时仍然遵照 2.2 小节的设定将实际粗糙程度近似相同的两个接触面假定 为一个接触面绝对光滑另一个粗糙面的粗糙程度为原来的 2 参照图 6, 当两连接器表面相互接触形成紧凑连接时假定光滑接触面位于直线 (a) 处且位置不变粗糙接触面的平均高度位于直线 (c) 粗糙表面凸起尖峰的平均高度位于直线 (b) 直线 (b) 与直线 (a) 的距离为 d 0, 凸起尖峰与直线 (b) 的距离为 x. 在弹性形变条件下 (扭力扳手控制连接器实现的紧凑接触金属表面仅发生弹性形变), 当尖峰高度 x > d0 凸起尖峰与光滑表面发生 MM 型接触 x = d0 尖峰与光滑表面发  MIM 型接触 x < d0 尖峰与光滑表面不发生接触.

 6 示出了 5 种不同高度的凸起尖峰其中高度 x 1, x 3  x 4  MM 型接触但形成的连接结大小不一致 (尖峰嵌入光滑面的深度不一致); x 5  MIM 型接触即尖峰与光滑面刚好接触但二者之间有一层绝缘膜层; x 2 为未接触尖峰不形成导电结.

假设金属表面的凸起尖峰服从高斯分布那么金属表面此 5 种凸起尖峰的总数应分别相等当发生松散接触时即保持直线 (a) 位置不变直线 (b), (c) 和所有凸起尖峰整体轻微下移那么原来 MIM 型接触尖峰 x 5 将变为未接触尖峰; MM 型接触尖峰 x 1  x 4 的连接结将变小, x 3 将变成 MIM 型接触若进一步下移, x 3 将变为未接触尖峰, x 4 将变为 MIM 型接触依次类推直至两接触面完全 分离在整个分离过程中因为各种尖峰的总数分别相等所以 MIM 型连接结数量不发生改变减少 的仅为 MM 型连接结那么 4 所示的等效电路在松散接触情况下, MIM 接触支路不会发生任何 变化 (两同轴连接器完全分离瞬间除外), MM 型接触部分的阻抗值会随松散电接触程度不断增加即松散电接触导致增加的电阻与感抗应该位于 MM 型电接触支路中.

总之松散电接触的静态模型属于宏观模型解释了相对于紧凑连接松散电接触交界面的电特征参量发生了何种变化而松散电接触的动态模型属于微观模型它对于这种变化的电特征参数量在 等效电路中的位置进行了确定.


 3 节的建模分析可得出两个结论: (1) 松散电接触会使同轴连接器交界面的阻抗增大且增大的阻抗位于 MM 型电接触支路一侧; (2) 松散电接触会使交界面的电流线从非接触区域向接触区域汇 导致接触区域面的电流密度增大本节将在 CST 软件中建立同轴连接器的松散电接触仿真模型对上述结论进行仿真分析与验证.

4.1 松散电接触阻抗分析

如前所述松散电接触将产生不规则的非接触区域且该非接触区域的面积大小与松散电接触程 度正相关本小节将进一步探讨与验证非接触区域面积大小对同轴连接器交界面阻抗的影响机制根据图 2(a)  (b) 的描述本文在 CST 软件微波工作室中建立的 7/16 DIN 型同轴连接器仿真模型如  7 所示仿真模型的总长度为 20 mm, 其内导体的外径与外导体的内径分别为: 7 mm  16 mm; 松散电接触发生在距离右终端 10 mm 位置接触区域填充物为白铜导体材料其电导率为 5.96× 107 S/m, 非接触区域填充材料为空气其厚度为 0.3 mm.

种不同的松散电接触情况如图 7 所示情况 (1): 为紧凑连接即电接触面积为理论连接表面积情况 (2): 将电接触面积减少为理论连接表面积的一半情况 (3): 将电接触面积减少为理论连接表面 积的 1/3. 3 种情况下同轴连接器的阻抗仿真结果如图 8(a) 所示当紧凑连接时 7/16 同轴连接器交界面的阻抗仿真为 49.6 Ω (略小于理论计算值 50 Ω); 当接触区域面积分别减少为紧凑连接交界面 总面积的 1/2 同轴连接器交界面的阻抗值增加至 50.07 Ω; 当接触区域面积减少为紧凑连接交界面 面积的 1/3 同轴连接器交界面的阻抗值进一步增加至 51.48 Ω. 此仿真结果可进一步证实松散电接触交界面的阻抗值随松散接触程度增加而增加.

4.2 松散电接触面电流密度分析

关于松散电接触面电流密度的仿真分析仍采用如图 7 所示的仿真模型和对应的 3 种不同的松散电接触程度情形其仿真结果如图 8(b) 所示当同轴连接器紧凑连接时交界面接触区域的面电流密度与同轴连接器交界面以外区域的面电流密度一致 (如图 8(b) 的黑色双点虚线所示), 保持  3.15 A/m2 左右当接触区域面积减少为紧凑连接交界面的一半时交界面接触区域面电流密度增加至 3.29 A/m2 左右交界面以外区域面电流密度仍保持不变 (如图 8(b) 的红色点虚线所示); 当接触区域面积进一步减少为 1/3 交界面接触区域的面电流密度增加至 3.48 A/m2 左右交界面以外区域面电流密度仍保持不变 (如图 8(b) 的蓝色虚线所示). 从上述仿真分析结论可知发生松散电接触 同轴连接器交界面以外区域的面电流密度不受影响但随着松散电接触程度增加 (交界面非接触区域也随之增加), 电流会不断汇聚到交界面的接触区域中换言之松散电接触程度越高同轴连接器交界面接触区域的面电流密度越大.

4.3 松散电接触等效电路模型

通过上述对松散电接触的建模与仿真分析可以证实当两相互连接的金属存在松散电接触时 金属交界面会出现额外的阻抗且该额外的阻抗包含增加的电阻阻抗和电感感抗两部分增加的电阻是由于电流在交界面接触区域的汇聚作用导致电流线汇聚使电流密度增加那么金属对电流的阻碍作用也将增强进而导致额外的电阻阻抗增加的感抗是由于电流线在交界面非接触区域的偏折导致电流线发生偏折使电流路径变长高频情况下产生额外的感抗此外虽然同轴连接器交界面接触区域的面电流密度会随松散电接触程度增加而增大但因为交界面非接触区域没有电流通过所以在发生松散接触时交界面的总电流并未发生变换因此相对图 4 所示的紧凑电接触等效电路松散电接触的等效电路模型可用图 9 进行描述.

在同轴连接器紧凑接触的条件下, C tv 的容抗远大于 Zt−mim  Rt−mm, 因此电流 I tv 的值远小  I mim  I mm, 所以电路 可以当做开路当同轴连接器存在松散连接时非接触区域面积进一步 增大且电路  C tv 的容抗增加速度远大于电路 中阻抗 ∆Z 的增加速度 (不管紧凑或者松散连接金属交界面未接触区域占绝大多数). 因此在松散连接情况下电路 仍可视做开路在松散电接触情况下, MIM 型接触的绝缘膜电阻 Rtf 及其所在电路 没有发生任何变化但是 MM 型接触 支路 9 所示的电路 会增加额外的阻抗 ∆Z, 此阻抗 ∆Z 会使通过电路 的电流 I mim 增加进而导致 Rtf 消耗的功率增加易知: Rtf 是绝缘膜层电阻呈现非线性特性其消耗的功率增加必将会恶化电接触金属的无源互调干扰水平.

此外虽然松散电接触会使电流 I mim 增加但是电流 I mm 仍然占据总电流 I 0 的绝大部分这是因为金属表面电流必须依靠遂穿效应透过绝缘膜层才能形成遂穿电流 I mim, 遂穿效应是一种十分微弱的物理现象换言之松散电接触一方面使 MM 型接触支路的阻抗明显增加 (见阻抗仿真结果),  一方面总电流 I o  MM 型接触支路汇聚因此在松散电接触条件下, MM 型接触支路将产生明显的自热现象在高功率微波电路中将更为明显热现象会改变金属的温度敏感参量例如电阻率当接 触金属的电阻率发生变化时又会反向作用于接触面的自热现象如此双向作用的电热耦合效应使得金属的电阻率不再是一线性电阻它是恶化电接触金属无源互调水平的另一方面原因关于绝缘膜层电阻 Rtf (电子遂穿效应 MM 型接触支路电热耦合效应所导致无源互调干扰的定量描述关系 参阅本课题组前期已报道的文献 [17, 18].

本文目的在于概述松散电接触无源互调影响机理的内在各种作用因素阐示松散电接触导致无源 互调干扰的特点使得本领域的研究和工程人员能够在实践应用中快速定性地判定与定位微波电路或系统的无源互调干扰是否由电接触故障所导致并不是为了建立松散电接触定量的无源互调预测模型来预测不同松散电接触情况下的无源互调干扰值因此本文所采取的实验验证手段也是定性而非定量的方式.


通过前述部分的分析可以知道松散电接触对连接金属交界面的电特征参数带来两方面影响: (1) 松散电接触会使连接金属交界面的阻抗值随松散接触程度增加而增加; (2) 松散电接触会使连接金属交界面接触区域的面电流密度随松散接触程度增加而增加因此本部分所设计实验也围绕此两方 面开展针对增加的阻抗对无源互调干扰水平的影响本文通过同种尺寸、不同制作材料的同轴连接器的方式进行验证针对增加的面电流密度对无源互调干扰水平的影响本文通过增大输入激励电流的方式进行验证.

5.1 测试装置

本文所搭建的实验测试装置如图 10 所示该验证平台由 3 部分组成反射式无源互调测试仪 ( 10 中编号 部分)、松散电接触被测试装置 ( 10 中编号 部分以及低反射无源互调终端负  ( 10 中编号 部分). 用无源互调测试仪产生双音激励信号到被测试装置并显示由被测试装置反射的无源互调测试结果整个回路的传输功率最终被低互调终端负载吸收由于采用的是反射式无源互调测试方法所以被测试装置以外的设备必须具有较低的无源互调反射值因此所选用的同轴 线缆、终端负载等都具有低反射无源互调特性.

本文采用的无源互调测试仪为美国通信器件公司 (Communication Components Inc., CCI)  PiMPro 1921 型产品且选用该无源互调测试仪的 PCS1900 频段其上行与下行带宽分别为 1930 1990 MHz  18501910 MHz, PCS 1900 的上行频带即为无源互调干扰可测试频段换言之被测器件 (device under test, DUT) 工作于 19301990 MHz 之间均可利用该型测试仪对被测器件的三阶与五阶无源互调值进行测试实践测试过程中发现当双载波输入频率 f1 = 1935 MHz, f2 = 1985 MHz 此时该无源互调测试仪产生的底噪最低因此本文的测试实验都选用此两个频率作为输入频率 么对应产生的三阶互调频率为 fPIM3 = 1885 MHz. 其中较高的三阶互调频率 2035 MHz 未落入其接收频段故测试时不作考虑.

5.2 测试结果分析

为实现同轴连接器不同程度的松散连接如图 10 所示在被测试装置 的左侧支架上设计一松 散角度标识器首先使用扭力扳手顺时针旋转同轴连接器的公头 (对应连接器的母头已被固定在铝合金支架上), 当扭力扳手发出 “滴答” 声之后表示连接器公头与母头已实现紧凑连接并将此处标识为紧凑接触或者松散连接角为 “0” 的位置然后利用扭力扳手逆时针旋转连接器公头的螺帽 (按松散角度标识器中蓝色箭头所示角度标识器的步进 (精度 10 ), 便可以实现不同角度的松散连接.

(1) 阻抗对无源互调干扰的影响测试. 3 种不同材料制作的 7/16 DIN 型同轴连接器 1 种是白 铜材料制作 (电导率: σ = 5.12 × 107 S/m, 此处电导率指室温 20的测量值);  2 种也为白铜材料制作但是在同轴连接器的交界面电镀了一层 10 µm  (电导率: σ = 3.76 × 107 S/m), 实际上相当于 铝制同轴连接器连接 3 种同样为白铜材料制作但是在同轴连接器的交界面电镀了一层 10 µm  (电导率: σ = 6.30 × 107 S/m), 实际上相当于银制同轴连接器连接测试时, 3  7/16 DIN 同轴连接器除接触面材料不同以外其余实验条件如同轴连接器尺寸、激励信号功率以及测试环境均保持一 利用图 10 所描述的无源互调测试平台, 3 种同尺寸、不同交界面材料 7/16 DIN 型同轴连接器的三阶无源互调值如图 11 所示 11 正方形、六边形和三角形符号分别表示铝制、铜制和银制同 轴连接器的三阶无源互调测量结果为便于分析结论对上述测量值进行数值拟合其拟合结果如图 11 中虚线所示.

从图 11 的测量结果可以得出两个结论首先三阶无源互调干扰值随松散电接触程度的增加而增 其次同等松散电接触条件下交界面为铝材质的同轴连接器的三阶互调值最高白铜材质的同轴 连接器次之银材质的同轴连接器的三阶无源互调值最低此三者的差异仅仅在于材料电导率的不同该实验结果表明电导率越高的材料其无源互调干扰值越小金属电导率与阻抗成反比也就是说电镀铝的同轴连接器交界面的阻抗最大、白铜材质的同轴连接器次之、电镀银的同轴连接器无源互调值最低此测试结果定性地证明了无源互调干扰值随同轴连接器交界的阻抗增加而增加与第 3 节的分析结论一致.

(2) 面电流密度对无源互调干扰的影响测试由于互调测试仪输出电压可保持恒定所以改变被测试同轴连接器的面电流密度可以通过输入不同激励功率实现参照图 12, 35 dBm, 30 dBm  25 dBm 3 种不同测试功率分别由无源互调测试仪施加到被测试电路中由于电压保持不变那么输入功率为 35 dBm 的面电流密度最大, 30 dBm 的面电流密度次之, 25 dBm 的最小其对应观测到的三阶无源互 调测试结果在图 12 中分别用三角形、圆形和正方形符号表示红色虚线表示相应测量结果的数学拟合值 (方便观察实验统计结果). 从图 12 所示的测量结果也可得出两个结论首先无源互调水平随输 入激励功率 (面电流密度增加而增加且输入激励功率越高产生的无源互调水平越高一致性也越 其次测试的三阶互调值并未像输入功率一样成 5 dBm 增长进一步体现无源互调干扰的非线性特点.


本文从金属电接触表面的微观特征结构入手对金属松散电接触的互调干扰现象进行理论建模、 软件仿真以及定性的实验测量分析结论指出松散电接触对无源互调干扰的影响机理存在两方面因素首先松散电接触现象使得通过非线性绝缘膜电阻的电流值增加进而恶化接触金属的无源互调水平其次松散电接触现象使金属交界面的阻抗增加和电流汇聚到接触区域进而在交界面产生明显的自热现象使接触金属的电阻率动态变化最终导致接触电阻呈现非线性特征进一步恶化接触金属的无源互调水平.

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即将上市:ESDEMC Technology的CCTLP解决方案

电容耦合传输线脉冲发生器(CC-TLP),与标准JS-002 CDM测试仪相比,允许用户生成具有更高控制和可重复性的类CDM脉冲,这是通过vf-TLP而不是CDM测试仪完成的。 研究设备对CDM压力的响应只需要CC-TLP探针夹具和vf-TLP设置即可。此应用的典型vf-TLP脉冲设置通常分别为1ns和100ps的脉冲宽度和上升时间。

ESDEMC Technology即将发布其CC-TLP探测解决方案,作为对现有vf-TLP解决方案的补充。包括特殊软件支持。 CC-TLP解决方案最终将是市场上第一家提供自动校准和设备探测的选项。也可以使用倾斜调节旋钮和微型定位器手动进行校准和探测,CC-TLP探测头可以轻松地安装到微型定位器上。


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PB2021.02 一种评估多载波倍增放电频谱的分析方法

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 Abstract—Radio frequency (RF) noise can severely degrade the performance of electronic circuits and wireless systems. This article proposes an analytical method to evaluate the spectrum of RF noise caused by multicarrier multipactordischarge.First, a simplified model is developed to analyze the electric current characteristics of the resonant multicarrier multipactor discharge. Then, an analytical formula for the spectrum of the resonant multicarrier multipactor discharge is derived. Finally, the theoretical method is evaluated for dual-carrier operation inside a silver plated rectangular waveguide. Simulation results coincided well with theoretical findings show that the proposed method is encouraging.

Index Terms—Multicarrier, multipactor discharge, parallel plate model, rectangular waveguide, RF noise



Multipactor is a nonlinear phenomenon which is caused by the interaction between the charged particles and the applied RF fields [1], [2]. Multipactors are generally classified into two types on the basis of the carriers of the applied RF fields, namely, single-carrier and multicarrier multipactor discharge. The main effort of this work is focused on the multicarrier mutipactor cases; the theoretical analysis and the resulting equations developed in this article are valid only for monoenergetic secondary emission.

As is well known, when there is an electric field between two small parallel plates, the initial electrons of the parallel plate region will be accelerated by the electric field and then impact against the surface of the plate. One or more electrons are released after impact. If some of the electrons synchronize with the electric field, such process as aforementioned is repeated until a steady state is reached (the growth of multipactor electrons ceases to continue) [3]. Multipactor discharge causes a number of negative influences such as the RF noise, passive intermodulation, impedance mismatch, and signal distortion, which can severely degrade the performance of microwave circuits [4]–[6].

In the past decades, various models and analytical methods were proposed to suppress or predict multicarrier multipactor breakdown in microwave devices [7]–[11]. For example, in [7], a new quasi-stationary (QS) prediction method for multipactor breakdown determination in multicarrier signals has been presented; the experimental results show that the QS prediction method offers better predictions than that the popular 20-gap-crossing rule. In [8], the performance of the most popular multipactor breakdown prediction method, i.e., the 20-gap-crossing rule, for multicarrier signals, has been checked by experiments. In [9], the Monte Carlo method has been proposed to find the thresholds and the global “worst case” waveforms of both single-event and long-term multipactors. However, in practical situations, it is almost impossible to completely suppress multipactor discharge for all cases. Therefore, it is necessary to understand the spectrum characteristics of multipactor discharge, as it is useful for designing the noise compression components and filters to eliminate the RF noise generated by multipactor discharge.

The spectrum characteristics of the single-carrier multipactor discharge have been well investigated by some works [12]–[15]. For example, Sorolla et al. [12] presented a model to evaluate the power spectrum of a single-carrier multipactor discharge. Semenov et al. [13] analyzed the amplitude spectrum of the multipacting electrons in rectangular waveguide with single carrier signal. Jimenez et al. [14] measured the power spectrum of the multipactor event excited in a single-carrier microwave circuit based on rectangular waveguides. However, a specific theory, which is used to analyze the spectrum characteristics of multicarrier multipactor discharge, attracts little attentions to the best of the authors’ knowledge [15].

In this article, a theoretical analysis method is presented to analyze the spectrum characteristics of the multicarrier multipactor discharge. It should be noted that the multipactor electrons are considered to resonate with the fundamental RF carrier. This article is organized as follows: Section II analyzes the frequency characteristics of the multicarrier RF field briefly; it will be used to find the period, harmonics, and subharmonics of the resonant multicarrier multipactor discharge in later Sections. In Section III, a simplified model of the multipactor electrons is stated first, and then a numerical expression for evaluating the spectrum of multicarrier multipactor discharge is derived. In Section IV, simulations are conducted to demonstrate the effectiveness of the proposed theories. Section V draws a conclusion of this article.


In this section, the frequency characteristics of multicarrier signals are proposed. A multicarrier signal u(t) (RF field) is composed of k carriers with frequencies ωi , angular phases ϕi , and amplitudes Ui , mathematically

where ωi = 2π fi , i are integers, and I = 1, 2…k. Furthermore, as detailed in [16], if fi are integers, the frequency f of the multicarrier signal u(t) is the greatest common divisor of the set carrier frequencies fi , mathematically

In practical microwave circuits, the precision of fi is usually limited to decimals; thus, the integer frequencies can be obtained by normalizing fi . For example, when f1 is equal to 2.33 GHz, the normalized integer frequency of f1 will be written as 2330 MHz.

Three cases (A, B, and C), when ϕi = 0, Ui = 1, and the carrier numbers are 2, 2, and 3, are shown in Table I to explain the analytical results in (2). As illustrate in Table I, the frequencies of cases A, B, and C are 0.5, 0.6, and 0.05 GHz, respectively. These demonstrated results will be used to analyze the period, harmonics, and subharmonics of the multicarrier multipactor discharge.


In this section, the analytic model and mathematical expression are developed to analyze the spectrum characteristics of the resonant multicarrier multipactor discharge.

A. Analytical Model

As shown in Fig. 1, a parallel plate model is adopted to investigate the spectrum characteristics of the resonant multicarrier multipactor discharge. The length, height, and width for the parallel plate model are defined as d, h, and w, respectively. As shown in Fig. 1(a), the electrons resonate with the applied electric field and grow exponentially. The parallel plate model will be filled with the resonant electrons after a few nanoseconds, and the current of those resonant electrons is directly related to the multipactor noise [12]. Therefore, the cruces of eliminating the multipactor noise are the analysis on the spectrum characteristics of the resonant electron current.

B. Mathematical Expressions of the Spectrum Characteristic

As shown in Fig. 1(b), we assume that all resonant electrons are localized in a thin sheet L, and L is located at zL . Here, the bottom and top plates of parallel plate model are located at z = 0 and z = h, respectively. The distance between the thin sheet L and the bottom plate is |zL |. Because the resonant electrons are driven by the RF field u(t), the motion of the thin sheet L is repeated with the period of the RF field u(t). Furthermore, the direction of this thin sheet L orients only in the z-axis, when d L and w L are assumed; the theoretical model of this article is developed in Fig. 1(c). Therefore, the current density of the thin sheet L can be calculated as [13]

where v(t) is the instantaneous velocity of the thin sheet L, in the units of meter per second (m·s−1);

z is the motion direction of the thin sheet L (does not carry units); ρ is the volume charge density, measured in coulombs per cubic meter (C·m−3), and ρ can be further measured with putting a positive probe in the multipacting components [14]. Since the thin sheet L is directly derived by the RF field u(t), according to the Newton–Lorentz force law, the relationship between the instantaneous velocity v(t) and the RF field u(t) can be written as

where m and e are the electronic mass and the electronic charge, respectively. As Ui = U0 and ϕi = 0 are first assumed in (1), and then integrating (4), the instantaneous velocity v(t) can be expressed as

where t0 and v0 are the initial time and the initial velocity of the thin sheet L, respectively, and v(t0) = v0. T is the period of the RF field u(t). N is the multipactor discharge resonance order, and N = 1, 3, 5, 7, … odd.

Equation (5) consists of two parts, which are the oscillation velocity vosc(t) and the constant velocity vcon(t). As shown in (6), vosc(t) changes continuously with time t and thus contributes only to the basic carrier frequencies of the current density J [14]. vcon(t) represents an antisymmetric square-wave function with period NT, which changes in a step-like way after each impact against the surface of the parallel plate; the instantaneous jump of vcon(t) will lead to distortion of the carrier signals. Therefore, the harmonics and subharmonics of the current density J are completely determined by vcon(t).

As also shown in (6), vcon(t) is an antisymmetric step function with the period of NT. Therefore, vcon(t) can be expanded by Fourier series; the Fourier series is an expansion of a periodic function in terms of an infinite sum of harmonically related sinusoids [17]. Specially, the Fourier series of vcon(t) can be rewritten as

Furthermore, the Fourier coefficients a0, an, and bn of vcon(t) can be calculated as

Substituting (8) into (7), vcon_FS(t) can be rewritten as

where n is the orders of harmonics and subharmonics, and s belongs to positive integers. Since vcon_FS(t) is an expansion of vcon(t), vcon_FS(t) is equal to vcon(t), then v(t) = vosc(t) + vcon_FS(t).

When taking both vcon(t) and vosc(t) into considerations and ignoring the motion direction

z, the current density J can be rewritten as

Equation (10) shows an analytical expression to evaluate the spectrum of the current density of multicarrier multipactor discharge. The following conclusions can be drawn from (10): 1) in the first-order multipacting resonance N = 1, the odd harmonics ( f , 3 f , 5 f,…, and f = 1/T ) of the RF field u(t) are generated. For example, the harmonics are determined by the last term in (10) and expressed in
∞ n=2s−1 sin[2πn/T (t − t0)], where s belongs to positive integers, and n = 2s − 1; therefore, the harmonic components are 1/T , 3/T , 5/T,··· , n/T (i.e., f , 3 f , 5 f , ··· , nf, f = 1/T ). 2) in the higher order multipacting resonance N ≥ 3, the subharmonics are generated and can be described by 2πnf/N. It means that the frequencies of the subharmonics are directly related to the order of multipacting resonance N and the frequency f of the RF field u(t). 3) the magnitude of the multicarrier multipactor noise, including harmonics and subharmonics, decreases with the order n. For example, in (10), the amplitudes of harmonics and subharmonics are expressed in
∞ n=2s−1[v0 − (U0e)/(hmωi)
k i=1 sin(ωi t0)]4/(nπ ), and thus for a particular case of multicarrier multipactor discharge (i.e., the coefficients of v0, U0, k, h, and ωi are fixed), the amplitudes are only affected by n and decrease with it.

Two cases, which are used to further illustrate the frequency components calculated by (10), are shown in Fig. 2. The data employed to analyze the frequency components in the above two cases are set as follows: k = 2, t0 = 0, U0 = 30 V, v0 = 6.68 eV. Form the example, we see that the third, fifth, harmonics (3 f , 5 f ) and the seventh, eleventh, thirteenth subharmonics (7 f /3, 11 f /3, and 13 f /3) are very close to carrier frequencies and need to be addressed carefully.


In this section, a dual-carrier multipactor discharge, which occurs in a rectangular waveguide, is designed to demonstrate the proposed theories in Section III. The length and width of the rectangular waveguide are 10 and 8 mm, respectively. The height of the waveguide covers two different sizes, 0.6 and 2.4 mm, in order to provide the multipactor orders of 1 and 3. Silver-plated waveguide surfaces have been assumed; thus, the standard silver parameters in ECSS [18] are used as follows. δmax = 2.22, Emax = 165 eV, E1 = 30 eV, and taking v0 = 6.68 eV, SEY at low energies of 0.5.

The multipactor noises are investigated in the time domain and the frequency domain, respectively. A conformal time domain finite integration theorem (TDFIT) and particle in cell (PIC) hybrid method are used to simulate the dual-carrier multipactor discharge in the time domain [19]–[22]. Furthermore, two separate simulations, electromagnetic (EM) simulation and dual-carrier multipactor, are conducted in this work. Except for the difference of seed electrons, other simulation conditions such as RF fields, SEY, and material parameters are the same in both cases. In the dual-carrier multipactor simulation, the number of seed electrons is set as 600, which is employed to analyze the multipactor noise. In the EM simulation, the number of seed electrons is set as 0, which is employed as a controlled experiment to confirm that the RF noise only relates to the multipactor discharge.

The simulation results are shown in Figs. 3 and 4, where Fig. 3 illustrates the changes of the total electrons in the silverplated rectangular waveguide. It is easy to see that there is a significant increase in the number of the resonant electrons after 6 ns, which means the multipacting resonance occurs at t > 6 ns

Fig. 4 shows the results of the EM simulation (no multipactor) and dual-carrier multipactor discharge simulation in a silver-plated rectangular waveguide. The red dashed line represents the simulation result of the EM simulation, where the multipactor discharge is not presented due to the absence of seed electrons. The blue dashed dotted line represents the simulation result of the dual-carrier multipactor discharge. It is important to notice that a time-varying convection current is generated in the dual-carrier multipactor discharge simulation. This convection current is caused by the resonant electrons and always treated as multipactor noise because they can affect the integrity of the propagating signals [23], [24]. Comparing the results between Figs. 3 and 4, it is easy to see that the intensity of multipactor noise increases with the total number of the multipactor electrons.

In order to study the spectrum characteristics of the dualcarrier multipactor discharge, the simulation results in Fig. 4 are further analyzed in the frequency domain using a standard Fourier transform algorithm, and the corresponding results are shown in Fig. 5. The blue dashed dotted line and the red dashed line represent the power spectrum of the dual-carrier multipactor simulation and EM simulation, respectively. We can clearly see that the odd harmonics ( f , 3 f , 5 f , …) and subharmonics ( f /3, f , 5 f /3, …) emerge and decrease with the frequency ft, and ft is the frequencydomain variable of time t. As also shown in Fig. 5, a good agreement between the simulation results and the theoretical analysis results (i.e., the cyan open circles) is observed.


Although it is well known that the RF noise could be caused by the multicarrier multipactor, the frequency components of the multicarrier multipactor noise have not been sufficiently investigated. In this article, an analytical method of evaluating the spectrum characteristics of the muticarrier multipactor has been proposed. According to our investigation, the frequencies of the multipactor noise can be described by 2πnf/N, which are directly related to the multipactor discharge resonance order N and the frequency of the RF field. This conclusion is useful for designing the noise compression components or filters to eliminate the RF noise caused by multicarrier multipactor discharge.


The authors would like to thank prof. V. E. Semenov, Institute of Applied Physics, Nizhny Novgorod, Russia, for his helpful discussions in the theoretical analysis. The authors would also like to thank Dr. Yiming Zhang, Maritime Institute, Nanyang Technological University, Singapore, for his helps in the simulations and in the proofreading of this article.

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PB2020.11 一种提高重复性的继电器放电FICDM方法

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Abstract – A new design for CDM testing is proposed that retains the field charging DDT method while providing a consistent discharge inside of a reed switch. The method is shown to adhere to the current JS-002 standard and to perform at low voltages, but JS-002 failures could not be exactly replicated.

I. Introduction

A CDM event occurs when the pin of a charged device approaches an external metal object such that the potential difference exceeds the breakdown voltage of the air gap between them. The device generally becomes charged by either E-field charging, in which electric fields near the device cause the potential of the device to change without changing its net charge, or Tribo-charging, in which a static charge is generated when the device slides on another surface [1]. The field induced CDM method (FICDM) is one of the best methods to simulate a true CDM event. In this method, the device is placed on a dielectric sheet, under which a plate of varying voltage levels changes the potential of the device, thereby emulating the E-field charging method. However, current FICDM testers are plagued with repeatability issues due to the variable spark resistance of the air discharge making the practice difficult to standardize [1 ][2]. As CDM testing voltages decrease, the variability of the air discharge increases, causing concern over the ability to meaningfully classify devices at lower voltages [3]. This is becoming increasingly problematic as the necessity for classification at lower levels is becoming greater with advances in IC technology [1].

This work presents a CDM tester that incorporates a relay into the pogo pin structure and maintains adherence to the Joint CDM Standard ANSIIESDA/JEDEC JS-002 [2] for FICDM testing. The use of a mercury wetted reed switch in the pogo pin allows for a more consistent spark resistance during low voltage pulses when compared to discharges in air. The method also preserves the field induced charging method which closely replicates the real world CDM charging mechanism. This method may produce failures that cannot be exactly replicated by other contact first CDM testers [4]. The new CDM tester is evaluated in comparison to a standard FICDM system through discharge waveform comparisons on calibration modules and device failure analysis.

II. RP-CCDM Tester

A. Discharge Circuit

The RP-CCDM [5], or Relay Pogo-Contact First CDM is a design of the CDM discharge head that allows for the use of a repeatable relay discharge while largely preserving the design parameters of the JS-002 standard. Figure 1 shows a cross section of the RP-CCDM head.

As shown in Figures 1 and 2, the RP-CCDM uses the field charging method as well as a similar discharge path to the one specified in the JS-002 standard. To charge the device, the pogo pin of the RP-CCDM ground plane is lowered to contact the DDT pin, then the field plate is brought to the specified charge voltage. At discharge, the reed switch is closed and the current flows up the pogo pin, through a high bandwidth In resistor, and to ground. The voltage is measured across the In resistor from which the discharge current waveform is then calculated.

B. RP-CCDM Testing Procedure

The RP-CCDM charges the DDT after the pogo-pin has contacted the pin to be tested. This is to ensure failures due to non-measured currents passed through the capacitance between the lower pogo and the ground plane or through the capacitance inside the reed switch like the currents observed in [6][7], do not occur when the non-charged pogo tip touches the DDT. By contacting the pin ofthe DDT first, the potential of the lower portion of the pogo-pin is slowly increased concurrently with the potential of the device. Thus, no high frequency transient can pass through the capacitances as might occur if the neutral pogo tip touched a higher potential pin on the DDT. The single and double discharge methods specified in the JS-002 standard can still be used for pulsing in the RP-CCDM depending on when the discharge relay is closed. The process for the single discharge method, which was used for all tests in this work, is as follows:

Single Discharge Method

1) Test starts with reed switch open; field plate grounded

2) Descend and touch DUT

3) Switch field plate relay to HV at specified TC voltage x voltage ratio

4) Wait for DDT to charge

5) Close reed switch, measure the CDM current

6) Switch field plate to ground

7) Open reed switch

8) Rise and move to next pin

C. Reed Switch

The reed switch used in the pogo pin structure was chosen specifically for its small form factor. The switch was soldered directly to the center of the In current sensing resistor. A small 3mm pogo pin was soldered directly to the bottom lead of the reed switch to keep the length of the pogo structure as small as possible such that the inductance of the structure would not increase drastically. To analyze the impact the new structure would have on the capacitance and inductance of the RLC discharge circuit, a ZDUT measurement was taken of the system. This measurement setup can be seen in Figure 3. The outer rim of a SMA connector was soldered into a cutout on the center of a copper plated FR4 sheet, which is much larger than the CDM head ground plane, approximately 30 cm x 20 cm, and connected to Port 1 of the VNA. The CDM head to be analyzed was attached to Port 2. The pogo pin of the CDM head was placed on the center pin of the Port 1 SMA with the ground planes parallel and the S11 measurement was extracted from which the ZDUT was extracted. Figure 4 shows the ZDUT measurements of a standard FICDM and the RP-CCDM discharge heads. The measurement displays three clear regions where each of the components in the circuit dominate. The first positIve slope represents the frequency range where the inductance of the VNA ground loop dominates, the negative sloping region represents where the capacitance between the plates dominates, and the third region represents where the inductance of the pogo structure dominates [8].

The values of the capacitance between the plates and the inductance of the pogo structure were estimated by fitting the impedance curves of capacitance and inductance values to the ZDUT measurement. This was done by finding a linear best fit line between the peak and trough of the ZDUT and matching the capacitance or inductance value to the center frequency of the best fit line. The fitted lines provide rough estimates but allow for a general assessment of the differences between the discharge heads. This method yielded a significant increase in the inductance from approximately 4.5nH in the CDM pogo structure to approximately 8.9nH in the RP-CCDM pogo structure. Little difference was noted between the capacitance created by the RP-CCDM and standard FICDM head.

D. Charge Stored in the Pogo Tip

The tip of the RP-CCDM pogo structure is electrically isolated from the upper portion of the structure and the ground plane. As a result, there is a small charge that is stored in the tip when the DDT is charged. When the relay is closed the small amount of charge travels through the 10 current measurement resistor with the true stress current. To measure the extent to which this would be a factor in the discharge, the large verification module was charged at a field plate voltage of 500V with the pogo touching. After the module was fully charged, the head was raised up and the relay was closed. Figure 5 shows the discharge waveform measured from repeating this procedure ten times compared with the discharge from a JS-002 small verification module. The current measured is most likely negligible if the DDT is large. However, this could be of significance when testing a small DDT since the current produced from this extra charge is independent of DUT size. The possible effect on failure levels of small devices has not yet been evaluated.

The charge transferred during one discharge of the tip was compared to the charge transferred during one discharge of the small JS-002 module as a reference of the impact the additional charge could have, this is shown in Figure 6. Over 10 pulses the average charge transferred in a discharge of the pogo tip was 0.029 nC, whereas the charge transferred in a discharge of the small module was 2.593 nC on average. Thus, the charge stored in the tip represents approximately 1.14% of charge discharged from small verification module.

III. RP-CCDM vs FICDM Discharge Characteristics

A. Comparison of Standard Test Conditions

To test the discharge characteristics produced by the RP-CCDM head, it was tested using the small and large verification modules defined by the JS-002 standard [2]. The comparison data was collected using a standard FICDM head, also manufactured by ESDEMC Technology. The modules and pogo tips were cleaned with isopropyl alcohol before testing as well as the field plate dielectric surface. The humidity of the test environment was lowered to below 10% RH during testing of the standard FICDM head using a desiccant and compressed air system. As per the JS-002 standard a voltage factor was used to correlate the charge voltage with the desired discharge current. The voltage factor used for the RP-CCDM was 1.08 and the voltage factor for the standard FICDM was 1.02. The true 10 current measurement resistor values were 1.026 and 1.030 for the standard FICDM and RP-CCDM heads, respectively. All waveforms were measured using a 6GHz Bandwidth Oscilloscope.

A full test of both setups verified that they complied with the JS-002 standard measurements. The pulse width of the RP-CCDM was considerably longer than that of the standard FICDM head, especially with the larger module. This can be attributed to the increased inductance of the pogo pin. However, the RP-CCDM head easily fits into the pulse width specification in the JS-002 standard. Some distortion in the peak area is also seen across both modules. It is not clear yet whether this distortion has any impact on the failure levels of devices.

B. Linearity of Discharge Current

The main advantage of the RP-CCDM is the ability to produce a repeatable discharge inside of the reed switch portion of the pogo pin. Figures 9 and 10 were created by normalizing the current and voltage relationship of the TC125 test to 1, for both the standard FICDM and the RP-CCDM. A value of 1 represents a perfectly linear relationship. The highlighted region around the centerline represents where the highest and lowest pulses fell at each test level. To illustrate the repeatability benefits.

In addition to a more repeatable discharge, Figures 7 and 8 show the RP-CCDM is also able to produce a peak current that is more linear with respect to increasing voltage. The much lower pulse to pulse variation of the RP-CCDM would make it easier to standardize the failure levels of devices, which has been a large issue with standard FICDM testing [1].

C. Low Voltage Performance

Since the peak current variation is less in RP-CCDM configuration, this will provide better repeatability at low voltage levels. Table 4 and Figure 11 show the results of 100 discharges performed with a field plate charge voltage of 75V using the JS-002 small verification module for both the standard FICDM head and the RP-CCDM head.

As shown in Figure 12, the RP-CCDM can produce repeatable pulses within a +/- 5% window of the peak current even at voltages well below the lowest test condition used for classification.

Further, the RP-CCDM was tested at lower voltages to find where it could no longer produce repeatable pulses (at these voltages the standard FICDM was too unstable to trigger properly). The RP-CCDM tests were run in two ways: first, with the pogo pin sitting on the small verification module, charging and discharging without moving, and second, with the standard single discharge procedure. These results, tabulated and shown in Table 5 and Figure 12, showed that the pulse was less repeatable when the pogo pin re-contacted the disk every pulse. This difference is most likely due to small differences in contact resistance between pulses and highlights the impact contact resistance can have at very low voltages.

At 10V, over the course of 100 pulses there were many extraneous pulses for both stationary and moving tests, likely making the RP-CCDM pulse unclassifiable at this level. These results are tabulated and shown in Table 6 and Figure 13.

IV. Device Failure Analysis

Test ICs were used to investigate the failure correlation between the standard FICDM and the RP-CCDM test setups. Pre-charging voltage values are 500 V, 625 V and 750 V, while two devices are tested per each method using three discharges per polarity. The chip offers several power and 10 domains that are all stressed either in the FICDM test or RP-CCDM test, respectively.

The device failure analysis of the correlation study between FICDM and RP-CCDM is carried out via IDDQ testing. The failure is expected for pre-charging voltages higher than 500 V and located on the edge of the digital core. The IDDQ analysis measures the current consumption in the quiescent state on 200 vectors in the digital core.

The quiescent current into VDD for all vectors is below 100/lA, in case of an unstressed reference device. Slight deviations in this range are traced back to normal variations. A significant increase of the current compared to the reference device indicates a gate-oxide failure on the edge of the digital core.

The device stressed at 500V using FICDM method shows a current consumption below 100 /lA, indicating the device can withstand the stress. The device stressed at 625 V using FICDM method, shows an increased current consumption up to 180 /lA, which indicates a failure. The failure analysis of the devices stressed at 500V using RP-CCDM method, showed an increased current consumption between 210 /lA and 250 /lA, indicating failures. The device stressed using RP-CCDM method at 625 V, the measured current level is higher compared to the reference, and higher than the IDDQ values of the devices tested at 500 V using RP-CCDM method. Both failure analysis results for RP-CCDM method are interpreted as a device failure.

By comparing the IDDQ measurements for the failing devices, analyses show a very similar change for the same vectors. This is a strong indication that both test methods trigger the same failure mechanism. In order to get a deeper understanding of the failure mechanism and find out the pass level, a new device is tested with RP-CCDM at 400 V. The IDDQ analysis shows that the device can withstand this stress level. The IDDQ analysis is shown in Figure 14.

The discharge waveforms of a sensitive 10 pin are plotted for FICDM and RP-CCDM in Figure 15 and Figure 16, respectively. FICDM waveforms are recorded with 23 GHz bandwidth, RP-CCDM waveforms with 12 GHz bandwidth (different bandwidth is simply due to the RP-CCDM test being run at a later date with a different oscilloscope). The discharge waveforms are symmetric regarding the polarity, therefore, for simplification, only the positive waveforms are plotted. By comparing the peak currents of the discharges on the 10 pin, a dependency of the failure level on the peak current can be determined. The peak currents of each stress corresponding to the shown waveforms are listed in Table 7. The IDDQ analysis and the peak current values lead to the conclusion that the failure is triggered from exceeding the maximum peak current the device can withstand. According to the peak current values, the failure threshold is located between 4.1 A and 4.7 A.

The failures are reproducible for all tests with a statistic of four devices each, while all pins of the device are stressed.

Even if the waveforms for RP-CCDM are characterized by a longer pulse width and a slightly increased peak current, the total exchanged charge during the discharge event does not offer a significant difference between the different pins and testing methods. This is visualized with a box plot for twelve positive discharges on two devices and various pins in Figure 17. Further, the box plot shows that the RP-CCDM method produces less variation.

The EMMI scan for a failing FICDM and RP-CCDM device indicate that the spot of the failure is located in the core at the same place, meaning both methods trigger the same failure mechanism. Pictures of the failure signature are shown in Figure 18.

The failure level is further investigated by using Capacitively Coupled TLP (CC-TLP). This method allows correlating peak current levels or different pulse width settings to CDM stress parameters and can be applied to investigate CDM type failure modes [7, 9]. For the test device used in this study, the failure can be reproduced at about 5 A, using CC-TLP. FICDM and RP-CCDM failure levels are slightly different concerning the pre-charging voltage, but the CC-TLP test result supports that the failure mechanism is the excess of a certain peak current value.

The increased peak current of the RP-CCDM compared to the standard FICDM test could be adjusted with the test condition according to JS-002 in the future. RP-CCDM waveforms are very stable and the variation between several discharges is negligible, which is a benefit compared to FICDM.

Variations between standard FICDM discharges can be referred to the statistical influence of the spark that again varies with multiple parameters, such as the charging voltage or physical dimensions of package pins or balls. The spark limits the peak current and the oscillation, because of the resistive characteristic, which is considered as a series resistor and inductor in a circuit simulation [8]. Further, a slightly higher effective device capacitance could be assumed in the case of the RP-CCDM test, since the pogo pin is already touching the device before the discharge. This increase in capacitance is due to the fact that field plate and ground plate are closer together. The interaction between the device capacitance and tester capacitances are material for further investigations, including the altered resistance and inductance relationships.

V. Conclusion and Further Investigations

The RP-CCDM demonstrates that it can produce CDM pulses that closely match the pulses produced by a standard FICDM head within the testing framework of the JS-002 standard. However, device failure levels produced by the RP-CCDM head did not directly correlate to failure levels produced by the standard FICDM head. In the case study, the gap between failure levels at 500 V and 625 V can be referred to as a slightly higher peak current in the case of the RPCCDM waveforms. Further investigations into the current that could flow from the capacitance between the pogo pin and the ground plane or within the reed switch when the uncharged pogo tip contacts a charged DDT are needed. Full-wave simulations of the RPCCDM system are planned in order to better understand the effects any unmeasured currents may have on the test results.

VI. Acknowledgements

We would like to thank Dr. Kai Esmark from Infineon Technologies AG for providing the testing devices, for his support regarding the failure analysis and for sharing his wide knowledge of ESD, and in particular, of CDM.

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ESDEMC正在发布一系列HVRF-HN高压上升时间滤波器。这些滤波器通常被用来设定标准TLP测量的上升时间,但是他们也被用于其它低压或高压波形塑造的用途。ESDEMC提供的标准模型有HVRF-10N、HVRF-10N、HVRF-20N、HVRF-50N、HVRF-100N、HVRF-200N、HVRF-500N、HVRF-1000N和HVRF-1200N,分别对应上升时间为10 ns、20 ns、50 ns、100 ns、200 ns、500 ns、1 μs和1.2 μs。其它上升时间可根据需求定制。所有的滤波器可处理3kV的脉冲并具有高反射抑制。

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PB2020.09 射频信号对ESD保护二极管触发电压的影响

下载PDF – 射频信号对ESD保护二极管触发电压的影响


Abstract— Discrete transient voltage suppressor are used in addtion to the on-chIp ESD protection to protect the ICs from ESD damage. In applications involving snapback TVS devices, the trigger voltage is selected to be higher than the desired signals on the net. The presence of RF on the net affects the TVS behavior, even the RF levels are less than the snapback trigger voltage. Known affects are RF intermodulation and harmonic generation, which diminish HNR. This work describes the other effect on the TVS diodes, the observed reduction of the snapback trigger voltage, monotonically dependent on the amplitude of the RF signal. This translates into snapback triggering at low stress levels than specified in the datasheet or expected by the design engineer. TLP testing was performed using a 100 ns pulse with RF signal from 100 MHz to 2 GHz present at the diode terminals. The result show that the higher frequencies have a weaker impact on the reduction of snapback trigger voltage, and the phase of the RF signal impact the amount of reduction in the trigger voltage. It is also observed that certain TVS diodes recover from snapback even when the RFamplitude is higher than the holding voltage of the diode.

Keywords— Electrostatic discharge(ESD); radio frequency(RF) signals; snapback devices; transmission line pulse(TLP); TVS.



ICs are designed with internal protection elements to protect them for component level electrostatic discharge (ESD) stress events. In addition to the component level protection circuits, external transient voltage suppressor (TVS) devices are necessary at system-level to provide sufficient ESD robustness to a device [1]. Based on the signal interface type, appropriate TVS device are selected based on various TVS parameters and the signal interface design requirements. In [2], various TVS devices such as diodes, varistors, spark gaps, and polymers were analyzed using a custom designed board and the pros and cons were discussed for different use cases. The PIN limiter diodes which are typically used for power limiting applications, were analyzed in [3] to quantify their ESD robustness on RF paths and compared against the protection capability of a TVS diode. In [2]-[3], methods for characterization of protection devices were evaluated. ESD simulator, 100 ns TLP and VF-TLP are common measurement approaches to evaluate various devices for component-level ESD characterization. VNA measurement is used to evaluate impact of the protection device on signal integrity.

In [4], the harmonic generation of the diodes is characterized to understand their RF large signal behavior. RF was applied, but no TLP pulses have been applied at the same time. The authors of [5] propose a system that combines TLP and RF, but not simultaneously. It subjects the device under test (DUT) to TLP pulses, then followed by RF measurement (S-parameters, IIP3, noise figure, etc.) to characterize the DUT. The work presented in [6] characterizes the RF devices before and after ESD event. It was shown that the performance of RF circuits and devices can degrade at ESD stress levels below the failure levels proposed by the commercial human body model (HBM) testers. However, none of these works address the possibility of RF signals being present at the time of the ESD pulse.

In this paper, the ESD protection capability of the TVS diodes was experimentally characterized during the presence of RF signals at the diode. The goal is to quantify the change in the TVS behavior. Two types of TVS diodes were investigated: the non-snapback and the snapback type. The snapback type diodes are designed to have a holding voltage Vh lower than the trigger voltage Vt1. An example of snapback behavior in the I-V curve is illustrated in Fig. 1.

It is shown that non-snapback diodes are largely unaffected, but snapback device Vt1 is changed by the RF. At 100 MHz it is observed that Vt1 reduces proportionally to RF amplitude. The effect decreases with increasing RF frequency. A new measurement method was proposed which applies both the RF and the TLP pulse at the DUT simultaneously. The transient voltage and current, and the quasi-static I-V curve are analyzed. Based on the experimental results, an additional consideration is proposed for the TVS diode selection on RF interfaces.


A. Traditional TLP characterization process

The industry-defined standard [7]-[8] 100 ns TLP setup consists of five main parts: a pulse generator, a voltage probe, a current probe, an oscilloscope, and a DUT – e.g., an ESD protection TVS diode. The simplified block diagram is shown in Fig. 2. The quasi-static I-V characteristic of the TVS diode under test is extracted from 70-90% window of the transient V(t) and I(t) waveforms captured by two channels of an oscilloscope.

The typical testing approach is to perform a sweep of the TLP charge voltage, and establish several characteristics: a) diode breakdown voltage Vbr, b) diode dynamic resistance Rdyn; in case of snapback TVS diodes: c) holding voltage Vh, d) snapback trigger voltage Vt1. In addition, device self-heating effect and physical failure levels can be observed.

The very fast TLP (VF-TLP) variation [9] of the characterization setup is often used for evaluating transient behavior of the protection devices (e.g. switching speed) for shorter pulses (1-10 ns) and shorter rise times (100-600 ps). This work, however, focuses on the 100 ns TLP test configuration.

B. RF+TLP characterization process

The 100 ns TLP setup allows for a wide variety of test results, but assumes no RF signal present across the diode terminals. A novel testing method is proposed; it allows to force RF signal on the DUT during characterization. ESD protection devices are evaluated in this scenario and the effect of RF on their performance is observed.

The RF+TLP test setup modifies the 100 ns TLP measurement system by ESDEMC [10]. The simplified block diagram is given in Fig. 2. The signal generator RF Source output is amplified to 15 W using AMP1. The 20 dB attenuator ATTEN1 reduces the stress seen by AMP1 output terminal, as TLP pulse is injected via a T-junction TEE1. As the pulse is injected, part of it propagates towards the amplifier and is subsequently dissipated and absorbed, while the other part is forced on the DUT.

Oscilloscope Channel 3 with a CT1 probe is used to determine the current that is forced into the DUT. Oscilloscope channel 4 with attenuator ATTEN2 measures the voltage at the DUT terminal. The original voltage pick-off tee and the CT1 probe on oscilloscope channels 1 and 2 respectively measure total injected current and voltage close to the injection point. Captured VDUT(t) and IDUT(t) are processed in the same way as the standard TLP in order to produce quasi-static I-V curves.



Four TVS devices are evaluated in this work, as mentioned in Table I.

A. Effect of RF on non-snapback TVS diode I-V characteristic

TVS1 is a non-snapback diode with Vbr = 9 V and Rdyn = 2.1 Ω. The effect of RF at 100 MHz, 1 GHz, and 2 GHz on this non-snapback diode is negligible. As an example, the effect of 100 MHz on the I-V curve is depicted in Fig. 3.

Figs. 4 and 5 illustrate the time-domain voltage and current waveforms during the presence of RF signals. To obtain the quasi-static I-V curve, the 70-90% window is applied to the time-domain waveforms. The voltage and current values during the 70 ns to 90 ns time are averaged to obtain the I-V curve plot. For a 100 MHz RF signal, the period is about 10 ns, which covers 2 cycles within the 20 ns long averaging window. Similarly, the period for 1 GHz RF signal is 1 ns and about 20 cycles are superimposed on the TLP signal in the averaging window. Lastly for a 2 GHz RF signal, the period is about 0.5 ns and about 40 cycles are overlapping in the I-V curve averaging window. Therefore, for each RF signal a full number of periods fall in the averaging window, thus the effect of added RF voltage is zero in average. In case of other frequencies, incomplete cycles within the 70-90% averaging window may affect the I-V curve values depending upon the phase of the RF signal and the TLP pulse. Furthermore, it is expected that lower frequencies may introduce more change in the I-V curve. In this case, the cycle is wider, resulting in stronger contribution to the average value calculation, as opposed to a narrower incomplete cycle (i.e. of a higher frequency signal).

B. Effect of RF on snapback TVS diode I-V characteristic

TVS2 is a deep snapback diode with Vt1 = 18.1 V and Vh = 2.6 V. The effect of RF with varied Vpp at 100 MHz on this snapback diode is depicted in Fig. 6. The effect on I-V curve is not strongly observed at 1 GHz and 2 GHz RF. Contrary to the non-snapback TVS diodes, the snapback diodes do exhibit reduction in their snapback trigger voltage Vt1 in the presence of RF signals. The reduction in the Vt1 also reduces with the frequency of the RF signal. At 3 Vp 100 MHz RF signal, a maximum reduction of 2.8 V is measured on the Vt1 of TVS2. TABLE II gives a summary of the effect for TVS2 snapback trigger voltage.

A deep snapback device showed reduction in the snapback trigger voltage, though a non-snapback TVS diode did not exhibit any change in its clamping behavior. To investigate this unique snapback TVS behavior, additional snapback TVS diodes are measured. TVS3 is a shallow snapback diode with Vt1 = 4.6 V and Vh = 2 V. The effect of RF with varied Vp at 100 MHz, 1 GHz, and 2 GHz on this snapback diode is depicted in Fig. 7. TABLE III gives a summary of the effect for TVS3 snapback trigger voltage.


The time-domain voltage and current waveforms of TVS3 during the presence of 100 MHz RF signal are plotted with and without RF. Fig. 8 illustrates the voltage and current waveforms prior to the snapback trigger. Fig. 9 illustrates the waveforms after snapback occurs. Contrary to the voltage time-domain waveforms in Figs. 4 and 5 for a non-snapback device, the voltage waveforms in a snapback device exhibit two key differences in their response. Consider the TLP waveform from 0 to 100 ns as the reference. For non-snapback TVS, the Vpp cycles are superimposed equally above and below the TLP pulse. However, for snapback type devices, the RF signal is not superimposed equally on the TLP pulse. Secondly, the Vpp swing on the non-snapback during the TLP pulse is not the same as the Vpp prior to the application of the TLP pulse. These two observations suggest why the two types of devices respond differently to the same RF signal.

The effect at lower frequencies is due to superposition of the voltage waveforms, so that the diode snapback triggers as , thus snapback occurs at lower TLP stress than nominally. At higher frequencies, the effect is weaker and does not follow this rule. A negative monotonic relationship between the RF frequency and reduction in Vt1 is observed.

When each measurement is repeated multiple times, another effect on Vt1 is observed: the voltage varies with the phase of the RF at the moment of the rising edge of the TLP pulse. The effect is illustrated in Fig. 10, and summarized for TVS4 for 100 MHz RF and swept RF amplitude. The figure shows positive monotonic relationship between reduction in Vt1 and RF amplitude. However, the trend does not follow the expected linear reduction of Vt1 with amplitude increase, caused by superposition of RF and the TLP pulse.

C. TVS device appears to not recover from snapback

TVS4 is a shallow snapback diode with Vt1 = 4 V and Vh = 1 V. The effect of RF with 1-7 Vpp at 100 MHz on the diode is depicted in Fig. 11. In this case, the TVS4 was only measured at 100 MHz, as maximal reduction in other snapback TVS diodes was observed at this frequency. The Vpp was increased to observe the trend in the reduction of the snapback trigger voltage. At 5 Vpp and higher, the TVS diode appears to not recover from snapback, but rather appears to stay in that regime for all consecutive pulses as long as RF is present on the net. Normally, this happens if Vdc > Vh and leads to diode damage. While a detailed understanding requires knowledge on the type and implementation of the snapback structure within the TVS a preliminary explanation is suggested. The RF voltage causes currents for two reasons:

Conduction current: if the peak amplitude of the RF current is large enough before diode turn-on, carriers are injected into the base regions (assuming SCR snapback TVS). Thus, even a weak excitation can trigger the snapback. Fig. 12 (b) compares transient voltages and describes the diode triggering and switching to low-impedance regime (i.e. snapback). It is evident from the curve corresponding to 5 Vpp RF, that triggering happens at a much lower voltage than in nominal conditions (i.e. “No RF”). Although not fully understood, it is reasonable to assume that the time needed to flush out charge carriers will influence the severity of this effect.

Displacement current: the RF voltage will cause a current in the parasitic capacitive paths within the TVS. This current may also inhibit the return from snapback.

TVS2 and TVS3 were tested for similar effect, but only reduction in Vt1 was observed. This suggests that specificity of die layout defines whether the appearance of snapback latch-up will occur.


In the process of interface protection design, it is important to account for the reduction in the trigger voltage of snapback TVS diode due to the presence of the desired RF signals. The following difficulties can be anticipated and avoided if the diode is well characterized:

As observed in Fig. 12 (a) the current through the diode at RF Vpp = 5V is much higher than Vpp = 4 V prior to the arrival of the TLP pulse. Thus, the RF signal voltage will drop across the diode and reduce SNR at the receiver.

The increased current at higher RF Vpp = 5 V is only observed after the snapback device is triggered once by the transient event. The device remains in this state (conducting current) at large RF Vpp as long as the RF signal stays across the device.

Various non-linear effects of a TVS diode (e.g. voltage- dependent capacitance, etc.) cause intermodulation distortion (IMD) and harmonic generation [11], which degrade receiver performance. It is likely that a diode that behaves like TVS4 will cause stronger harmonics, leading to antenna desense. This behavior is an avenue for further investigation.

As RF Vpp increases, the snapback diode behaves effectively like a non-snapback TVS as observed in the I-V curve in Fig. 11. The figure shows an effective trigger voltage of Vbr < Vh. From the quasi-static behavior of the device, it appears that the TVS does not recover from snapback for the cases where Vpp = 5 V, 6 V, and 7 V. However, the time-domain waveforms in Fig. 12 depicts that the TVS goes into snapback at Vdiode << Vt1. It should be noted that the RF signal was constantly applied at the TVS device throughout the testing. This behavior was only observed for consecutive TLP pulses.

The root cause of the RF frequency dependence on device behavior is not well understood and needs further investigation. Device transient behavior simulation using SPICE-based models [12], [13] and TCAD are a possible tools to further analyze the reduction in trigger voltage due to presence of RF signals. Particularly for the lower frequency RF signal such as 100 MHz, the phase alignment of the RF pulse with the TLP pulse affects the reduction in the trigger voltage.


While selecting a snapback TVS diode for providing ESD protection on RF interfaces, the effect of RF signals on the trigger voltage of the diodes must be taken into consideration. Based on the proposed TLP + RF characterization setup, it was observed that in presence of RF signals, the TLP voltage that is needed to trigger snapback is reduced. The sample size of 4 diodes is limited and no generalizations can be made, however the trends show the following: 1) the effect of Vt1 reduction is positively dependent on RF amplitude, 2) reduction in Vt1 shows negative dependency on RF frequency, 3) non-snapback TVS diodes are largely unaffected by the RF signal.

For one of the investigated TVS diodes a sufficiently large RF signal makes the TVS appear to not recover from snapback. Due to the presence of RF, even weaker ESD stress can easily trigger the TVS diode into snapback. This effect is expected to take place when Vp > Vh, but the results suggest that this is not necessarily the case for all diodes. Each protection device should be evaluated separately. The system designer must account for a lowered trigger voltage for the snapback TVS diodes. A typical data sheet of a protection device does not provide information about the change of protection characteristics under various operating conditions. Including the effects observed in this work would lead to a more accurate understanding of the devices.


This paper is based upon work supported partially by the National Science Foundation under Grant No. IIP-1916535.


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ESDEMC即将发布新开发的ES640系列自动化CDM(Charged Device Model, 充电器件模型)测试机台。 ES640可支持多种现行的CDM测试方法包括广泛使用的场感应放电(FI-CDM)测试方法(ANSI / ESDA / JEDEC JS-002-2018,AEC Q100-011D,AEC Q101-005A),为低压CDM设计的多种先接触再放电(CCDM)测试方法,例如LI -CCDM(ANSI / ESD SP5.3.3-2018),CC-TLP方法,以及我们正在申请专利的RP-CCDM方法。RP-CDM是一种高稳定度的,最接近JS002标准的CCDM测试方法,其校准波形完全符合JS002中的波形标准。 ES640型的高精度电机驱动可将XYZ方向的移动步进降至1 µm,可进行电路模块,封装器件和一些晶圆级的CDM测试。 该解决方案还具有更大的测试区域(150 x 150和300 x 300 mm)。 两种型号都为被测器件或模块提供了足够的空间。 另外,ES640系列机台也可根据客户需求,定制测试区域面积。 ES640使用DSP,可以大大提高测量带宽。对测试链路(包括盘式电阻器,线缆,衰减器和测量通道接头)的频率补偿算法,可以使系统测量带宽超过18 GHz。 ES640型具有±5V至±2000V / 4000V的精确电压控制范围,在测试设置中最多可以启用三个摄像头,以方便用户操作(两个摄像头分别在X和Y方向上观察放电针的接触情况,另一个摄像头在Z方向进行垂直对齐)。 ES640的测试软件可以进行放电波形的自动获取,系统校准,对测量波形数据进行频率补偿数据处理,以及优化测试速度,同时支持多种CDM测试方法。 可应要求提供旧标准和定制的CDM方法。 您可随时通过info@esdemc.com与我们取得联系,以获取有关测试系统的更多信息。

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ESDEMC正在扩展其高压脉冲衰减器的品类,开发了HVAT-3K20-1G22E型号高能量脉冲衰减器。 尽管带宽不如其他ESDEMC衰减器(HVAT-3K20-1G22E的工作频率为DC – 1GHz,衰减变化<±1 dB),但该型号衰减器能够承受的能量比其他型号高很多。下表比较了HVAT-3K20-1G22E和市场上其他20 dB高压脉冲衰减器的主要参数。

  带宽 经测试的最大电压@脉冲宽度 峰值功率(在SOA *之内) 最大单脉冲能量 连接器 衰减
ESDEMC HVAT-3K20-1G22E DC – 1 GHz(1dB Band) 3kV, 1ms5kV, 1us 180kW 200 J N-Type 20dB
ESDEMC HVAT-3K20-3.5 DC – 3.5 GHz(1dB Band) 3 kV, 500 ns 180kW 0.1 J SMA 20dB
ESDEMC HVAT-5K20-3.5 DC – 3.5 GHz(1dB Band) 5kV, 500 ns 500kW 0.5 J N-Type 20dB
HPPI HVA-20A DC – 7 GHz(3dB Band) 1.5 kV, 1 us 45 kW NA SMA 20dB
Barth Model 102 Series DC – 7 GHz(3dB Band) 5 kV, 80 ns 500 kW NA N-Type 20dB


下图是HVAT-3K20-1G22E的频率响应。 另外,ESDEMC可定制衰减器的衰减倍数。 HVAT-3K20-1G22E高能脉冲宽带衰减器

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即将上市:瞬态电压抑制器(DC-10GHz / DC-15GHz)

TVS-10G +瞬态电压抑制器,DC- 10GHz

TVS-15G +瞬态电压抑制器,DC- 15GHz

ESDEMC 公司即将发布两款新版TV​​S示波器保护器,新版本的保护器改进了现有的TVS-10G型号示波器保护器。新型TVS-10G +的设计更为紧凑,可消除低于钳位电压信号的上升沿失真问题。它还具有更快的钳位速度,可以同时改善信号完整性,并更好的实现对示波器的保护。新的TVS-15G更新了外壳,将工作带宽扩展到15GHz。

下表是TVS-10G(现有版本)与新TVS-10G +和TVS-15G的规格对比。

  TVS-10G TVS-10G+ TVS-15G
开启保护电压最小值(V) 6.5 7.5 6.2
开启保护电压最大值(V) 7.3 11 7.5
TLP动态电阻(4 – 16A)(Ohm) 1 0.45 1.2
IEC ESD等级– 接触模式 (kV) 20 10 12
IEC ESD等级– 空气模式(kV) 20 15 18
8 / 20us浪涌 Ipp值(A) 3.6 4.5 2

以下是ESDEMC不同版本 TVS示波器保护器的频率响应(插入损耗)。

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近期发布:CT-002 系列宽带电流探头

ESDEMC Technology将发布一系列电流探头,其最新版本为CT-002-S和CT-002-T两个类别。本系列电流探头旨在测量瞬变电流,其应用类似于泰克 CT系列电流探头。 ESDEMC的电流探头具有更宽的工作带宽和更高的饱和点,可用于更高和更低频率,以及更大电流的测量。与CT-002-T系列的通孔探头相比,CT-002-S系列变压器使用SMA连接,并允许更高频率的应用。当前,CT-002-S系列主要有CT-002-0p5和CT-002-0p2两个型号。 CT-002-T系列主要有CT-002-T-0p5型号。 下表比较了ESDEMC的电流探头与泰克 CT1、CT2电流探头部分参数。

  有效带宽 传输阻抗 电流-时间 常数
ESDEMC CT-002-S-0p2 400 Hz – 2 GHz 0.2 V/A 200 A-µs
ESDEMC CT-002-S-0p5 1 kHz – 4 GHz 0.5 V/A 75 A-µs
ESDEMC CT-002-T-0p5 1 kHz – 2 GHz 0.5 V/A 75 A-µs
泰克 CT1电流探头 25 kHz – 1 GHz 5.0 V/A 1 A-µs
泰克 CT2电流探头 1.2 kHz – 200 MHz 1.0 V/A 50 A-µs


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PB2019.08 基于VF-TLP表征的管脚限制二极管对ESD事件的鲁棒性

下载PDF – 基于VF-TLP表征的管脚限制二极管对ESD事件的鲁棒性


Abstract—PIN limiter diodes are primarily used for protection from excess RF power in RF circuits. These diodes are positioned onboard at the I/O lines of the RF circuits. If an ESD event occurs, the first line of protection is offered by the PIN limiter diode. The main questions addressed in this letter are: Can the PIN limiter diode protect the RF circuit against ESD? If yes, then what is their ESD robustness? How do they compare against the standard ESD protection TVS diodes? This knowledge can guide the reader to understand whether or not the PIN limiter diode can help prevent ESD damage. The robustness of the diodes is investigated experimentally using a very fast transmission line pulse tester with a 10 ns pulse width and about 300-400 ps rise time. These diodes are tested for their withstand current, turn-on time at 1 A current, turn-on voltage, voltage clamp at 1 A current, capacitance, signal bandwidth, and effective package inductance. These diode parameters are essential in quantifying the component-level response of a device under test. This letter shows that the PIN limiter diodes are not a suitable replacement for the TVS diodes as an intentional ESD protection device. In case an ESD event occurs, these diodes are robust to ESD current levels up to 2.5-9 A and offer limited protection. They may effectively complement the TVS protection by offering a fast turn-on time and protection up to a certain ESD level, after which the (slower) TVS takes over.

Index Terms—ESD, PIN limiter diodes, TVS, vector network analyzer (VNA), very fast transmission line pulse (VF-TLP).



Electrostatic discharge (ESD) protection has become a necessary design element in high-speed RF and microwave circuits. However, introducing ESD protection elements on RF circuits may cause RF performance degradation [1]. To prevent RF performance degradation, devices with low capacitance are designed and implemented [2]. Protection elements can be designed and implemented internally to the high-speed RF ICs, or they can be implemented using onboard external devices such as TVS components [3]. Onboard protection methods involve the use of primary and secondary protection devices [4]. The ESD protection device is placed before the component/part to be protected from ESD as shown in Fig. 1. Here, the primary onboard protection is placed near the source of the ESD stress, and the secondary protection diode (on-chip) is inside the protected device.

Under normal operating conditions, the protection devices offer high impedance and behave as a capacitance to the signal path. When an ESD event occurs, the onboard primary protection device is intended to carry a majority of the ESD-induced current while the secondary protection device carries the remaining current. During the event, the protection device turns on and clamps to its clamping voltage. At this clamped state, the impedance of the device is low, and it diverts the ESD current from signal trace to the ground. As a result, the device is protected from the ESD event.

PIN diodes are used in various applications such as switches, attenuators and phase shifters [5]. PIN limiters differ from the PIN diodes based on the doping of gold atoms in the I layer (middle layer) of the diode. The gold doping in the I layer reduces the minority carrier lifetime. The time the diode takes to recover from the low impedance state back to high impedance state (after the application of RF input signal bursts) is proportional to the minority carrier lifetime. Therefore, a lower minority carrier lifetime represents a faster diode recovery time [6]. A protection device from Keysight [7] known as an integrated diode limiter, consists of two limiters which can provide both power limiting and ESD protection; i.e., utilizing limiters for an ESD protection application. The ESD robustness of PIN limiters has not been reported in the literature. The PIN limiters may also provide ESD protection, even though they are typically used as power limiters.

In this letter, the ESD protection robustness was experimentally investigated for the PIN limiter diodes with low capacitance and surface mount style packages. The diodes were tested using a VF-TLP tester with a 10 ns pulse width, and about 300-400 ps rise time. This setup has a faster rise time and a shorter pulse width than the 100 ns standard TLP waveform. The IEC 61000-4-2 specification [8] stipulates that an I/O trace of interest on the PCB or an RF-circuit will not be subjected to a direct ESD discharge. The IEC pulse is expected to occur at a different location in the system. A regular TLP pulse has a rise time of approximately 10 ns. More important parameter than the pulse width is the rise time to assess the voltage overshoot during an ESD generator discharge. A VFTLP pulse [9] has a much faster rise time, typically 0.6 ns. A TLP waveform with a 100 ns pulse width and a rise time of 0.6 ns could be used, but it would not be possible to distinguish between two potential failure mechanisms, over-voltage due to the fast rise time and thermal damage due to the long pulse width. Thus, a narrow fast rising pulse is considered a better match than 100 ns TLP or IEC pulse.


A. PIN Limiter Diodes

Fig. 2 (a) depicts a typical power limiter application using the PIN limiter diodes. These diodes are soldered from trace to ground, which is similar to the implementation to the ESD protection implementation shown in Fig. 1. PIN limiter diodes from different vendors such as Macom/Aeroflex, Skyworks, and Microsemi were investigated.

B. TVS Diodes

TVS diodes are specifically designed to protect devices against damage from ESD events. PIN diodes can be a part of the internal structure of a low capacitance TVS diode [10] as shown in Fig. 2 (b). In this TVS configuration, PIN 1 and 2 would typically be designed such that ESD robustness for both polarities is approximately equal.

The TVS diodes are one of the most effective ESD protection devices amongst the other TVS components [3] such as varistors, spark gaps, and non-linear polymers. The focus of this letter is to investigate the robustness of various PIN limiter diodes to an ESD event and compare it against a TVS diode [11].


The device under test (DUT) I-V curve was measured using an ESDEMC VF-TLP tester [12] illustrated in Fig. 3. The I-V curve was used to extract diode parameters described in detail in Section IV. To evaluate the performance of the diodes, a grounded coplanar waveguide (GCPW) prototyping PCB board was used. The VF-TLP measurement setup details are as follows:

Non-overlapping time domain reflectometry method was used to measure the DUT current and direct voltage measurement method to measure the DUT voltage [13].

A VF-TLP pulse width of approximately 10 ns was applied to the DUT, to evaluate the first few nanoseconds response.

An oscilloscope with 20 GSa/s sampling rate and 6 GHz bandwidth was used. The rise time of the VF-TLP pulse measured at the oscilloscope was approximately in the range of 300 to 400 ps.

To determine the quasi-static I-V curve, the measurement window was set at 70% to 90% of the pulse width. The measurement window setting was applied to the flat region of the waveform. A measurement window is the range of time within the pulse width where the voltage or current of the pulse is measured to calculate the DUT voltage or current in response to the applied VF-TLP pulse [14].

• VF-TLP pulse polarity: An ESD event can have both positive and negative polarities. Emphasis was placed on the reversed bias diode clamping and its ESD current carrying capacity. In reversed bias orientation, the turn-on voltage is higher than the forward biased (p-n junction) turnon voltages approximately in the range of 0.7 to 0.8 V. It should be noted that the forward biased polarity is much more robust than the reverse biased polarity. This argument is based on the lower power dissipation of the forward biased orientation against the reverse biased orientation. For example, for the same TLP clamp current, the forward bias diode clamp voltage is lower than the reversed bias voltage and their turn-on voltages are different. In addition, this is strictly true if the current for the forward and reverse polarity are flowing through the same device (internal to the package).

The source measure unit (SMU) measured the leakage current of the DUT when 1 V was applied to the reverse polarity of the DUT after each TLP pulse.


The measurement results are shown for one PIN limiter diode Microsemi 4701-206 [15].

A. Capacitance

The capacitance is determined to be 0.25 pF at 50 MHz. The frequency point is determined from the 20 dB per decade region of the Z21 vs. frequency plot shown in Fig. 4 (a).

B. Frequency Bandwidth and Effective Package Inductance

A 3 dB cutoff point is chosen as the usable frequency bandwidth of the diode. The dotted line in Fig. 4 (b) represents the diode’s frequency bandwidth (approximately 14 GHz). The dotted two-sided arrow is a visual representation of the 3 dB insertion loss of the diode in excess of the trace insertion loss. The diode is modeled as a series RLC circuit in the passive (non-conducting) state. The LC resonance of the diode (approximately 19 GHz) is used to calculate the effective package inductance (0.27 nH) given by the formula:

C. Turn-On Time, I-V Curve, and Leakage Current

1) Turn-On Time: Using the VF-TLP tester setup, the diode time-domain voltage and current waveforms were measured for each VF-TLP source excitation voltage. In general, the DUT voltage waveforms can have inductive overshoot, snap back behavior or the non-inductive overshoot [16] for the very first nanoseconds and then followed by a relatively flat voltageclamping region. The non-inductive overshoot is caused due to the conductivity modulation in the silicon [17]. The qualitative illustration for the overshoot and the non-overshoot response of a diode is shown in Fig. 5. The diode clamp current is determined from the diode current waveform by applying the measurement window setting. The measurement window of 70% to 90% was applied to the diode voltage waveform, and the time-averaged voltage value was determined (VDUT). Vtrack refers to the voltage amplitude 30% above in case of an overshoot response and 30% below in case of non-overshoot response in the measured diode voltage waveform. The time associated with Vtrack voltage is called t2. The difference between the two times t2 and t1 is calculated as the turnon time. It should be noted that if a different % criteria is used for Vtrack, the turn-on time values for different diodes would change, but the overall trend and conclusions will not be affected. The diode current of 1 A is chosen as a comparison unit for the turn-on time parameter. A current of 1 A through the diode is typically used by TVS vendors for determining the diode clamp voltage [11]. In Fig. 6 (a) the vertical dotted lines represent the two time values that result in the turn-on time of 2.16 ns for the TVS diode and 0.21 ns for the PIN limiter diode. It should be noted that for the PIN limiter diode at 1 A current, the waveform was considered as a non-overshoot waveform to determine the turn-on time parameter. It was observed that the TVS diode [11] voltage waveform has an overshoot response in the initial nanoseconds followed by the flat clamping region.

2) I-V Curve Plotted for a Measurement Window of 70% to 90%: The VF-TLP pulses are applied to the DUT. Each pulse generates a diode current and diode voltage waveform. The measurement window is applied to the diode voltage and current waveforms to determine the average voltage (VDUT) and current (IDUT) values. The VF-TLP currents are in the range of 10 mA to 20 A. In this measurement range, the instrument applies about 50 pulses to the DUT. This generates an array of 50 voltage and current values, which are represented in the form of an I-V curve plot as shown in Fig. 6 (b).

3) Withstand Current: The VF-TLP pulse voltage at which the leakage current increases 10x to 100x from the initial leakage current value of the diode is chosen as a selection voltage. A VF-TLP pulse voltage lower than the selection voltage is chosen as the maximum withstand voltage. At this particular VF-TLP pulse voltage (maximum withstand voltage) the current at DUT (diode) is determined as the maximum withstand current the diode can handle. It should be noted that the SMU measures the diode leakage current after the application of every VF-TLP pulse. A withstand current (IDUT) of 3.7 A (using a 10 ns VF-TLP pulse width) is determined for the diode shown in Fig. 6 (b).

4) Turn-On Voltage: The voltage at which the diode current is in the range of 1-10 mA is determined as the diode turn-on voltage. Using this definition, a value of 21.8 V is obtained from the I-V curve plot shown in Fig. 6 (b). Here, the turn-on voltage refers to the quasi-static voltage measured at 70% to 90% of the pulse width, and not to the maximum dynamic voltage.

5) Voltage Clamp at 1 A: The voltage corresponding to a diode current of 1 A is used to determine this parameter. It is a parameter provided in TVS datasheet [11] to quantify the clamping behavior of the diode. The voltage clamp for different current levels can be determined from the complete diode I-V curve shown in Fig. 6 (b). Using this parameter definition at 1 A diode current, a voltage of 28.8 V is obtained from the I-V curve plot. This voltage value indicates that for a 1 A current through the diode, this diode will clamp at a voltage of 28.8 V.


Table I summarizes the different diodes tested, and their performance based on critical parameters. The diode capacitance, inductance, and frequency bandwidth parameters are essential to quantify the influence of the diode on signal integrity while the diode is in a passive state (during a non-ESD event). ESD withstand currents of about 2.5 A to 9 A have been observed, as well as turn-on voltages in the range of 20 V to 50 V. A frequency bandwidth of 6 GHz to 16 GHz is achievable, based on the different diodes tested in this letter. Diodes having smaller packages may offer larger bandwidths, due to the lower capacitance and inductance. The PIN limiter diode data was compared with an industry standard ESD TVS protection diode. Although most of the PIN limiter diodes that are shown in Table I may have faster performance for the turn-on time parameter than the ESD TVS diode, the ESD TVS diode has better performance in all other ESD diode parameters. Still, a PIN limiter diode may be part of a circuit design to protect against accidentally coupled high RF power. In this scenario, the PIN limiter diode will offer a moderate level of ESD protection.

Considering a system level ESD requirement for PIN limiter diodes, based on the faster turn-on time parameter, they can complement the TVS diode for the initial low-current ESD event. However, the TVS diode needs to turn on before the current through the PIN limiter crosses the withstand current. It should be noted that the turn-on voltage of the PIN limiter diodes are higher than that of the TVS which may limit the applicability of the PIN limiter and TVS combination. Thus, a system efficient ESD design (SEED) [4] will be needed further to evaluate a specific PIN Limiter and TVS diode combination for ESD protection application on a desired I/O trace.

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PB2019.08 可调速自控ESD模拟器空气放电稳定性分析及实验验证

下载PDF – 可调速自控ESD模拟器空气放电稳定性分析及实验验证

摘要:空气放电是最常见的静电放电(ESD)形式,但由于其重复性低,相关标准中没有给出其放电电流的标准 波形,这直接影响了对空气放电抗扰度实验的研究。ESD模拟器放电电极的接近速度是影响空气放电的电流波形 重复性的主要原因之一。利用研制的带垂直导轨可调速ESD模拟器空气式静电放电实验平台,能够对ESD模拟器放电电极驱近速度进行精确控制。利用该平台与人手持ESD模拟器分别对电流靶和受试设备(EUT)进行了空气放电实验研究,结果表明,研制的实验平台由于实现了放电电极接近速度的精确控制,能够使放电电流波形达到 较好的一致性。该装置将为电子设备静电放电抗扰度实验中空气放电实验的重复性提供一种解决方案。 



静电放电(electrostatic dischargeESD)是常见的近场电磁危害源,会通过传导或辐射干扰对电子产品产生干扰或损坏。为了研究电子设备或系统抗静电干扰的能力,人们制定了相关标准,规定了静电放电抗扰度实验测试平台、测试方法等。在静电放电抗扰度实验中,是利用 ESD 模拟器模拟实际中的静电放电。而 ESD 模拟器的放电形式有接触式放电和空气放电。在现行的静电放电测试标准 IEC 61000-4-2 标准中,直接放电以接触式放电为首选方 法,在不能使用接触式放电的情况下,才考虑用空气放电进行测试。标准中的间接放电是对金属耦合板进行放电,首选的实验方式也是接触式放电。此外,虽然标准中保留了空气放电实验方式,但它只给出了针对接触式放电的校准电流波形,没有针对空气放电的校准电流波形。

由于空气放电的放电机理复杂,放电电流波形受到很多因素的影响。除了温度、湿度、压强等环境因素外,放电电极接近待测设备的速度、放电电 压大小等都会对空气放电的电流波形造成影响[1-5] 因此,空气放电的可重复性较差。

针对电子设备的系统级 ESD 测试[6-9]及仿真研