PB2012.06 Nonlinear Capacitors for ESD Protection

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Hongyu Li, Victor Khilkevich, Tianqi Li, David Pommerenke, Missouri University of Science and Technology, USA;
Seongtae Kwon, Wesley Hackenberger, TRS Technologies, Inc., USA

Abstract – In order to protect electronic products from Electrostatic Discharge (ESD) damage, multi-layer ceramic capacitors (MLCC) are often used to bypass the transient ESD energy. Most
dielectric materials used in MLCC are nonlinear, since the dielectric constant decreases with increasing voltage, reducing the capacitance value, thus degrading the ESD protection effect. Using a large initial capacitance value will ensure sufficient ESD protection; however, the shunt capacitors also limit the signal bandwidth of the ESD-protected data channel, thus setting a maximal capacitance value at data voltage levels. This paper investigates the nonlinearity of capacitors and suggests improved tradeoff between ESD protection and data bandwidth by using the Antiferroelectric (AFE) capacitors as ESD protection. The dielectric constant of AFE material increases with increasing voltage. The voltage dependence of X7R and AFE capacitors are measured
using static and nanosecond transient measurements. The ESD protection effectiveness with different material capacitors are compared by simulation. Due to very limited availability of suitable
AFE material samples only hand-made capacitors have tested without investigating the long term stability of the material.

Index Terms— ESD protection, AFE material, nonlinear capacitor

I. Introduction

ESD is one of the most important reliability problems in an electronic product. In order to provide ESD protection to electronic products, decoupling capacitors and series resistors can be used as shown in Fig. 1. The capacitors absorb the injected charge, and limit the maxi

I. Introduction

ESD is one of the most important reliability problems in an electronic product. In order to provide ESD protection to electronic products, decoupling capacitors and series resistors can be used as shown in Fig. 1. The capacitors absorb the injected charge, and limit the maximal

showed no noticeable voltage dependence. The measurement fixture is shown in Fig. 4. The two cylindrical devices are the PIO capacitors.

B. Static Measurement Results for X7R Capacitors

Static measurement results for X7R capacitors are shown in Fig. 5. All four capacitors (4.7nF, 50V) showed similar behaviour. The capacitance decreases from 4.7nF to about 1nF at 400V DC bias. We observed no damage to the capacitors at 400V.

C. Static Measurement Results for AFE Capacitor

The measurement result for an AFE capacitor is shown in Fig. 6. The capacitance is about 3nF without any DC bias, and increases with increasing DC bias voltage before the transformation from the AFE phase to the FE phase. For this AFE sample, the transformation occurs at about 325V, causing a peak in its capacitance value of about 8.5nF at 325V. In the FE phase the capacitor acts as normal capacitor, and the capacitance decreases with increasing DC bias voltage. The capacitance drops back to 3.5nF at 500V.

IV. Transient Measurement

The nonlinearity of the capacitors can be seen clearly from the static measurement results. However, ESD is a transient process of nanosecond time scale. ESD currents typically have rise time of less than 1ns. However, the voltage and current rise times at the capacitor is limited by the capacitance value and the source impedance (about 300 Ohm for an IEC 61000-4-2 ESD generator at lower frequencies and around 100 Ohm at higher frequencies). The voltage and current rise time at a capacitor with hundreds pF or a few nF is generally between a few and tens of nanoseconds. Transient measurements investigate if the capacitance can react with sufficient speed to provide ESD protection.

A. Transient Measurement Method

In the measurement setup illustrated in Fig. 7, C represents the capacitor under test. A pulse with duration of 70ns and a rise time of 150ps generated by the Transmission Line Pulser (TLP) is injected into the capacitor under test through a microstrip transmission line. A loop formed by a trace and vias is embedded underneath the transmission line. The mutual inductance between the transmission line and loop is used to measure the derivative of the current flowing on the transmission line. The current is obtained by integrating the measured derivative of the current. The voltage across the capacitor is measured with an oscilloscope.

The measurements capture the current derivative and the voltage across the capacitor. The post processing obtains the current and the voltage derivative. Low pass filtering is used for noise suppression and de-trending is used to remove the effect of scope’s imperfect DC-offset on the integration of the current derivative.

B. Transient Measurement Results for X7R Capacitors

If the TLP is set to 1200V charge voltage it takes about 60ns to charge the capacitor to 450V, as shown in Fig. 8. The stress was repeated many times to assure the phenomena are stable. Results from three repeats are plotted in Fig. 8. The change of the capacitance versus time for X7R capacitors is shown in Fig. 9. The results show that the X7R capacitors react fast enough to the transient signal

Fig. 10 compares transient and static measurement results for X7R capacitors and the trend of the nonlinearity matches well.

C. Transient Measurement Results for AFE Capacitor

If the TLP is charged to 2500V, it takes about 60ns to charge the AFE capacitor to 400V, as shown in Fig. 11. Results from three pulses are plotted in Fig. 11. Those indicate good repeatability. The peak and the dip at the beginning and the end of the pulse are due the parasitic inductance in the measurement setup and the large rate of current change at the beginning and end of the TLP pulse. The measurements indicate an inductance of about 5.5nH for the AFE capacitor test setup. Only 1.3nH had been measured for the X7R capacitor (fig. 8). Its 0603 package allowed a lower inductance placement within the test setup. The change of the capacitance versus time for AFE capacitor is shown in Fig. 12. The result shows that the AFE capacitor reacts fast enough to the transient signal, allowing this beneficial property being used for ESD protection. Fig. 13compares the transient and static measurement results for the AFE capacitor and the trend of the nonlinearity matches well. The deviation above 300V may be caused by the limitation of the transient measurement method. Due to its large capacitance it was barely possible to reach 400V at the highest TLP charge line setting of 2500V as shown in Fig. 11, causing uncertainties in the capacitance estimation as the capacitance values are derived just at the beginning of the falling voltage edge.

V. Comparision of the Capacitors for ESD Protection

The effectiveness of the capacitors for ESD protection can be compared by simulation. The nonlinear capacitor models are based on the static and transient measurements.

A. SPICE Model for Nonlinear Capacitor

The Analog Behavioral Model is used to model the nonlinear capacitor, as shown in Fig. 14. The capacitor is modeled by a controlled current source, GVALUE in PSpice, whose current is defined by equation (2). The time derivative of the voltage is modeled by using the discrete derivative of time (DDT) function in PSpice. A voltage dependent capacitance is specified by using a look-up table based on the measurement. This table contains voltage-capacitance pairs picked from points on the measured curve. The voltage input is nonlinearly mapped from the voltage values in the table to the capacitance values. Linear interpolation is used between table values [9].

B. ESD Current Source Model

ESD generator is modeled using the equivalent circuit as shown in Fig. 15. This circuit models the current and the impedance of the ESD generator. Initially, the capacitors are charged until the switch initiates the breakdown. C4, L2, R4 and R5 set the initial rise time, R1 and C2 represent the interaction between the body of the ESD generator and ground. The main discharge constant (330 Ohm, 150pF) is formed by R3+R4+R5 and by C1+C2+C4. R6 represents the ESD target and the current flowing through it is shown in Fig. 16. In this example, the ESD generator is charged to 2000V initially.

C. Capacitors to Compare

Sample1 from the X7R capacitors is selected to compare to the AFE capacitor. Fig. 17 shows the capacitance normalized to their value at 0V. In the simulation both X7R and AFE capacitors are de-normalized to 1nF at 0V; therefore, both protection circuits have the same frequency response, but different protection behavior.

D. ESD Protection Effectiveness Comparison

The simulation circuit is explained in Fig. 18. The device under protection is assumed as an IC. Diode ESD protection is commonly used in IC design. Here only these diodes are modeled and the IC’s internal structure is omitted. The destruction threshold of the commonly used human body model (HBM) test level is 2000V. The IC level HBM test and the IEC 61000-4-2 testing are both based on discharges from a human body, thus their total charge and pulse length are similar. The source impedance for the HBM testing is 1500Ω. Passing the HBM test ensures a robustness of the IC input for currents up to about 1.3A which we assume as the failure threshold of the simulation. Another consideration leads to the usage of a series resistor. Without such a resistor the internal ESD protection of the IC would compete with the PCB based protection, possibly leading to the IC protecting an external ESD protection. A series resistor allows for a sufficient voltage drop separating both protection methods electrically. A resistance of 200Ω is selected in this simulation. ESR and ESL represent the effective series resistance and inductance of the capacitor respectively, whose values are set to 100mΩ and 1nH. The circuit is excited by the ESD generator shown in Fig. 15. The ESD generator is charged to 2000V initially.

The critical current flowing into the IC is shown in Fig. 19. Using the X7R capacitor, it reaches 1.6A which is above the destruction threshold ensured by 2000V HBM testing of 1.3A. In contrast the increasing capacitance of the AFE capacitor limits the peak current below 0.9A.

In designing a protection circuit, the 0V capacitance is determined by the required signal bandwidth. The protection effect is determined by the capacitance ratio between the capacitance at the highest voltage reached during ESD and its 0V capacitance. The larger the ratio is, the better the ESD protection will be. For the X7R capacitor this ratio is usually about 0.3, while it reaches about 3 for the AFE capacitor investigated in this research. This larger ratio allows an improved trade-off between ESD protection and bandwidth.

VI. Conclusion

X7R capacitors are often used as ESD protection. In this application the voltage across the capacitor will surpass the rated voltage, often reaching 400V on a 50V capacitor. The voltage dependence of capacitors with two different dielectric materials, X7R and AFE, are measured using both static and transient measurement methods. Similar capacitance changes have been observed for static voltages and transient voltage changes. The X7R capacitors lose most of their capacitance while the AFE capacitors increase their capacitance values as the voltage increases up to a certain point as shown in Fig. 13, for example. This increasing nonlinearity of AFE capacitor improves ESD protection at a given signal bandwidth. The improvement of the ESD protection has been quantified with simulation. The temperature dependence of the AFE’s capacitance and the long term reliability of AFE capacitors have not been investigated.


This material is based upon work supported by the National Science Foundation under Grant No. 0855878. EMC